| Mon, 28 Jan 2019 19:24:04 -0800 |
Michael Pavone |
Fix zero flag calculation in CPU DSL
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| Tue, 25 Dec 2018 11:12:26 -0800 |
Michael Pavone |
Merge from default
mame_interp
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| Fri, 06 Jul 2018 17:39:59 -0700 |
Michael Pavone |
Update controller config when changed in UI without restart
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| Wed, 31 Jan 2018 22:05:10 -0800 |
Michael Pavone |
Made the NOR flash emulation a bit more flexible, but not yet flexible enough to properly support the flash chip in the MegaWiFi cart
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| Sat, 30 Dec 2017 18:27:06 -0800 |
Michael Pavone |
Added MAME Z80 core, re-enabled 68K tracing in Musashi core, disabled a bunch of code gen stuff when using interpreters from MAME
mame_interp
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| Wed, 27 Dec 2017 13:46:52 -0800 |
Michael Pavone |
Super hacky integration of the version of Musashi from MAME
mame_interp
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| Wed, 13 Sep 2017 21:06:25 -0700 |
Michael Pavone |
Preserve original address when retranslating instructions instead of switching to the lowest alias
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| Mon, 03 Apr 2017 20:48:13 -0700 |
Michael Pavone |
Improved printing of word at absolute address to support reading from all address types. Implemented support for printing the value pointed to by a register. Removed abuse of read_dma_value in internal debugger.
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| Wed, 04 Jan 2017 20:43:22 -0800 |
Michael Pavone |
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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| Wed, 28 Dec 2016 20:39:27 -0800 |
Michael Pavone |
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
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| Tue, 04 Oct 2016 18:30:24 -0700 |
Michael Pavone |
Add a new memory map flag to support an auxilliary buffer for translating code from MMAP_PTR_IDX chunks for which the pointer is null
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| Wed, 27 Jul 2016 22:46:22 -0700 |
Michael Pavone |
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
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| Tue, 26 Apr 2016 23:13:37 -0700 |
Michael Pavone |
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
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| Mon, 11 May 2015 00:28:47 -0700 |
Michael Pavone |
Sync fixes and logging to fix more sync issues
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| Wed, 14 Jan 2015 09:38:54 -0800 |
Michael Pavone |
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
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