Thu, 03 Oct 2013 21:20:29 -0700 |
Mike Pavone |
Add support for test instruction to x86 generator library
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Tue, 10 Sep 2013 23:31:08 -0700 |
Mike Pavone |
Added copyright notice to source files and added GPL license text in COPYING
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Mon, 24 Jun 2013 21:32:25 -0700 |
Mike Pavone |
Fix access to int_enable_cycle in EI
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Tue, 21 May 2013 01:14:59 -0700 |
Mike Pavone |
Fix some minor copy pasta bugs that resulted in an unnecessary REX prefix being generated for some instructions
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Sat, 18 May 2013 11:44:42 -0700 |
Mike Pavone |
Mostly working runtime generation of memory map read/write functions
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Thu, 02 May 2013 00:10:24 -0700 |
Mike Pavone |
Don't mix *H regs with the REX prefix
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Sun, 28 Apr 2013 13:45:17 -0700 |
Mike Pavone |
Implement EX, EXX and RST in Z80 core
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Thu, 25 Apr 2013 21:01:11 -0700 |
Mike Pavone |
Get Z80 core working for simple programs
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Fri, 25 Jan 2013 18:39:22 -0800 |
Mike Pavone |
Fix overflow flag on ASL
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Wed, 16 Jan 2013 22:40:56 -0800 |
Mike Pavone |
Implement ABCD an SBCD. Fix BTEST with register source.
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Thu, 03 Jan 2013 22:07:40 -0800 |
Mike Pavone |
Implement MULU/MULS and DIVU/DIVS
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Mon, 31 Dec 2012 20:09:09 -0800 |
Mike Pavone |
Implement most of the "X" instructions
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Sat, 29 Dec 2012 22:11:28 -0800 |
Mike Pavone |
Fix encoding of movsx instruction when used with new (i.e. r9-r15) registers. This fixes the indexed addressing modes when used with a word-wide index register
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Sat, 29 Dec 2012 21:10:07 -0800 |
Mike Pavone |
Implement the rest of the bit instructions
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Fri, 28 Dec 2012 21:25:00 -0800 |
Mike Pavone |
Fix call_r in gen_x86 so that it properly returns a pointer to the location after the generated instruction
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Fri, 28 Dec 2012 17:57:43 -0800 |
Mike Pavone |
Implement scc (untested)
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Wed, 26 Dec 2012 11:09:04 -0800 |
Mike Pavone |
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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Sat, 22 Dec 2012 21:37:25 -0800 |
Mike Pavone |
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
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Fri, 21 Dec 2012 01:00:52 -0800 |
Mike Pavone |
Implement more instructions and address modes
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Wed, 19 Dec 2012 20:23:59 -0800 |
Mike Pavone |
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
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Sat, 15 Dec 2012 23:01:32 -0800 |
Mike Pavone |
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
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Wed, 12 Dec 2012 23:21:11 -0800 |
Mike Pavone |
Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
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Tue, 04 Dec 2012 19:13:12 -0800 |
Mike Pavone |
M68K to x86 translation works for a limited subset of instructions and addressing modes
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Tue, 27 Nov 2012 22:43:32 -0800 |
Mike Pavone |
Make x86 generator generic with respect to operand size for immediate parameters.
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Tue, 27 Nov 2012 09:28:13 -0800 |
Mike Pavone |
x86 code gen, initial work on translator
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