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log cpu_dsl.py @ 1759:6e4faa10f9ee

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Tue, 19 Feb 2019 22:51:33 -0800 Michael Pavone Store sync_cycle in context rather than in a local in CPU DSL. Fix the timing of a number of instructions in new Z80 core
Fri, 15 Feb 2019 23:58:34 -0800 Michael Pavone Basic support for string operands in CPU DSL
Tue, 12 Feb 2019 09:58:04 -0800 Michael Pavone Integration of new Z80 core is sort of working now
Sun, 10 Feb 2019 11:58:23 -0800 Michael Pavone Initial attempt at interrupts in new Z80 core and integrating it into main executable
Sat, 09 Feb 2019 11:34:31 -0800 Michael Pavone Optimization to memory access in new Z80 core
Fri, 08 Feb 2019 23:09:58 -0800 Michael Pavone Added option to CPU DSL to produce a threaded interpreter using computed goto
Thu, 07 Feb 2019 09:43:25 -0800 Michael Pavone Added init functions to z80_util.c so new Z80 core is closer to a drop in replacement for the old one
Wed, 06 Feb 2019 09:13:24 -0800 Michael Pavone Optimization of flag calculation for flags that just copy a bit from the result in CPU DSL
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