log gen_x86.h @ 1581:7121daaa48c2

age author description
Wed, 13 Sep 2017 21:06:25 -0700 Michael Pavone Preserve original address when retranslating instructions instead of switching to the lowest alias
Sat, 04 Feb 2017 00:41:15 -0800 Michael Pavone Cycle accurate MULU/MULS emulation
Thu, 26 Nov 2015 22:30:41 -0800 Michael Pavone Fix for Z80 retranslation post alignment rework
Thu, 01 Jan 2015 17:31:59 -0800 Michael Pavone Fix some issues with 68K instruction retranslation
Fri, 26 Dec 2014 12:34:41 -0800 Michael Pavone Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Mon, 22 Dec 2014 20:55:10 -0800 Michael Pavone Z80 core is sort of working again
Wed, 17 Dec 2014 09:53:51 -0800 Michael Pavone Get Z80 core back into compileable state
Mon, 03 Mar 2014 22:22:36 -0800 Michael Pavone Remove jmp_r from gen_x86.h since it got added to gen.h
Sun, 02 Mar 2014 16:34:29 -0800 Michael Pavone Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Sun, 02 Mar 2014 14:45:36 -0800 Michael Pavone Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Wed, 19 Feb 2014 00:22:27 -0800 Michael Pavone Apart from the Z80 core, BlastEm now supports 32-bit x86
Thu, 03 Oct 2013 21:20:29 -0700 Mike Pavone Add support for test instruction to x86 generator library
Tue, 10 Sep 2013 23:31:08 -0700 Mike Pavone Added copyright notice to source files and added GPL license text in COPYING
Tue, 25 Jun 2013 19:20:39 -0700 Mike Pavone Move IO code to a separate file and do a tiny bit of refactoring
Sat, 18 May 2013 11:44:42 -0700 Mike Pavone Mostly working runtime generation of memory map read/write functions
Sun, 28 Apr 2013 13:45:17 -0700 Mike Pavone Implement EX, EXX and RST in Z80 core
Fri, 25 Jan 2013 18:39:22 -0800 Mike Pavone Fix overflow flag on ASL
Thu, 03 Jan 2013 22:07:40 -0800 Mike Pavone Implement MULU/MULS and DIVU/DIVS
Mon, 31 Dec 2012 20:09:09 -0800 Mike Pavone Implement most of the "X" instructions
Sat, 29 Dec 2012 21:10:07 -0800 Mike Pavone Implement the rest of the bit instructions
Fri, 28 Dec 2012 17:57:43 -0800 Mike Pavone Implement scc (untested)
Wed, 26 Dec 2012 11:09:04 -0800 Mike Pavone Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Sat, 22 Dec 2012 21:37:25 -0800 Mike Pavone Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
Fri, 21 Dec 2012 01:00:52 -0800 Mike Pavone Implement more instructions and address modes
Wed, 19 Dec 2012 20:23:59 -0800 Mike Pavone Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Sat, 15 Dec 2012 23:01:32 -0800 Mike Pavone Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Wed, 12 Dec 2012 23:21:11 -0800 Mike Pavone Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Tue, 04 Dec 2012 19:13:12 -0800 Mike Pavone M68K to x86 translation works for a limited subset of instructions and addressing modes
Tue, 27 Nov 2012 22:43:32 -0800 Mike Pavone Make x86 generator generic with respect to operand size for immediate parameters.
Tue, 27 Nov 2012 09:28:13 -0800 Mike Pavone x86 code gen, initial work on translator