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log m68k_core_x86.c @ 996:784bc1e45e80

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age author description
Sat, 30 Apr 2016 09:45:53 -0700 Michael Pavone Fix 68K interrupt handling some more. Fatal Rewind is working again.
Wed, 27 Apr 2016 23:11:24 -0700 Michael Pavone Implement privelege violation exceptions
Wed, 27 Apr 2016 21:39:17 -0700 Michael Pavone Implemented IR and undefined bits of info word for address error exception frames
Tue, 26 Apr 2016 23:13:37 -0700 Michael Pavone Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Tue, 26 Apr 2016 00:07:15 -0700 Michael Pavone Implement illegal instruction trap
Sun, 24 Apr 2016 21:23:28 -0700 Michael Pavone Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Sun, 24 Apr 2016 02:19:48 -0700 Michael Pavone Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
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