log m68k_core_x86.c @ 1332:87bbc4bec958

age author description
Wed, 26 Apr 2017 21:55:12 -0700 Michael Pavone Fix timing for branch not taken case in the M68K BCC intruction
Mon, 24 Apr 2017 20:49:31 -0700 Michael Pavone Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Tue, 28 Mar 2017 09:39:54 -0700 Michael Pavone Fix exit trace mode edge case. Call do_sync if trace mode bit is changed in eori sr
Tue, 28 Mar 2017 00:13:35 -0700 Michael Pavone Implemented M68K trace mode. Some edge cases/SR update paths still need work
Wed, 22 Mar 2017 22:16:39 -0700 Michael Pavone Fix SBCD edge cases to pass Flamewing's test ROM. Could use some cleanup to produce better code for the SBCD case, but produces correct results now
Fri, 17 Mar 2017 08:05:55 -0700 Michael Pavone Minor fix to timing of "early" overflow case in divs when the dividend is negative
Wed, 15 Mar 2017 19:05:27 -0700 Michael Pavone Cycle accurate implementation of divs
Thu, 09 Mar 2017 23:50:46 -0800 Michael Pavone Fix undefined flags on overflow and divide by zero for divu based on hardware test. Fix saving result of divu when destination is not stored in a host register
Thu, 09 Mar 2017 21:31:31 -0800 Michael Pavone Forgot to update flags in the "good" case of the new divu code
Fri, 03 Mar 2017 23:51:29 -0800 Michael Pavone Cycle accurate divu and undefined flags for overflow case
Thu, 23 Feb 2017 00:08:37 -0800 Michael Pavone WIP support for XBAND mapper hardware
Sun, 12 Feb 2017 12:38:31 -0800 Michael Pavone Fix timing for instructions using BINARY_IMPL
Sat, 04 Feb 2017 00:41:15 -0800 Michael Pavone Cycle accurate MULU/MULS emulation
Tue, 24 Jan 2017 00:15:27 -0800 Michael Pavone Inefficient fix for overlapping instruction problem that was causing issues with Outrunners
Wed, 28 Dec 2016 20:39:27 -0800 Michael Pavone Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Mon, 19 Dec 2016 13:28:18 -0800 Michael Pavone Mostly working changes to allow support for multiple emulated system types in main blastem program
Sat, 05 Nov 2016 00:23:11 -0700 Michael Pavone Get Jaguar video interrupt working
Thu, 06 Oct 2016 21:11:58 -0700 Michael Pavone Remove hacky assumption about Genesis memory map in M68K core
Thu, 06 Oct 2016 09:34:31 -0700 Michael Pavone Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Tue, 10 May 2016 08:59:17 -0700 Michael Pavone Fix bug in 68K movep.l when the destination is a register mapped to a host register
Sat, 30 Apr 2016 09:45:53 -0700 Michael Pavone Fix 68K interrupt handling some more. Fatal Rewind is working again.
Wed, 27 Apr 2016 23:11:24 -0700 Michael Pavone Implement privelege violation exceptions
Wed, 27 Apr 2016 21:39:17 -0700 Michael Pavone Implemented IR and undefined bits of info word for address error exception frames
Tue, 26 Apr 2016 23:13:37 -0700 Michael Pavone Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Tue, 26 Apr 2016 00:07:15 -0700 Michael Pavone Implement illegal instruction trap
Sun, 24 Apr 2016 21:23:28 -0700 Michael Pavone Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Sun, 24 Apr 2016 02:19:48 -0700 Michael Pavone Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Sun, 24 Apr 2016 00:22:38 -0700 Michael Pavone Fix order of writes for move.l with a predec destination
Sat, 23 Apr 2016 12:43:23 -0700 Michael Pavone Properly imlement btst with an immediate destination. Fixes a crash in NHL 95.
Wed, 02 Dec 2015 07:06:03 -0800 Michael Pavone Fix problem in 68K debugger caused by stack alignment change