| Tue, 16 Jul 2024 20:21:08 -0700 |
Michael Pavone |
Partially functional asr/asl implementations in new 68K core
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| Tue, 30 Apr 2024 22:32:08 -0700 |
Michael Pavone |
Get blastem compiling with new 68K core
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| Tue, 30 Apr 2024 00:02:14 -0700 |
Michael Pavone |
Make some progress on compiling full emulator with new 68K core
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| Mon, 29 Apr 2024 22:57:33 -0700 |
Michael Pavone |
Fix constant propagation for sext instruction
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| Thu, 07 Mar 2024 00:53:11 -0800 |
Michael Pavone |
Implement lea and pea in new 68K core
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| Sat, 24 Feb 2024 22:54:36 -0800 |
Michael Pavone |
Implement ext instruction in new 68K core
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| Fri, 23 Feb 2024 23:09:07 -0800 |
Michael Pavone |
Fix carry flag calculation for neg instruction in CPU DSL
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| Mon, 19 Feb 2024 18:14:12 -0800 |
Michael Pavone |
Allow more if statements to be constant folded in CPU DSL
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| Mon, 19 Feb 2024 17:55:45 -0800 |
Michael Pavone |
Fix implementation of cmp for 32-bit operands or when operation size is smaller than the size of the operands
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| Thu, 15 Feb 2024 21:49:17 -0800 |
Michael Pavone |
Fix some issues in new 68K core and add implementations of negx and clr instructions
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| Mon, 12 Feb 2024 07:42:32 -0800 |
Michael Pavone |
Sugar for unary operators in CPU DSL
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| Sun, 11 Feb 2024 20:41:28 -0800 |
Michael Pavone |
Sugar for some basic conditionals in CPU DSL
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| Sun, 11 Feb 2024 20:15:00 -0800 |
Michael Pavone |
Sugar for binary operators in CPU DSL
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| Sun, 11 Feb 2024 17:26:52 -0800 |
Michael Pavone |
Added a little syntax sugar to CPU DSL and started updating new Z80 core to use it
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| Sat, 13 Jun 2020 00:37:22 -0700 |
Michael Pavone |
Somewhat buggy implementations of shift instructions in new 68K core
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| Thu, 23 Apr 2020 20:57:14 -0700 |
Michael Pavone |
Fix autogenerated temp variables in interrupt subroutine in CPU DSL
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| Sat, 21 Sep 2019 10:48:10 -0700 |
Michael Pavone |
Implement interrupts in call dispatch mode in CPU DSL
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| Thu, 18 Apr 2019 19:47:50 -0700 |
Michael Pavone |
WIP new 68K core using CPU DSL
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| Wed, 20 Feb 2019 00:34:52 -0800 |
Michael Pavone |
Fix calculation for whether coalesceFlags is needed for xchg instruction in CPU DSL
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| Tue, 19 Feb 2019 22:51:33 -0800 |
Michael Pavone |
Store sync_cycle in context rather than in a local in CPU DSL. Fix the timing of a number of instructions in new Z80 core
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| Fri, 15 Feb 2019 23:58:34 -0800 |
Michael Pavone |
Basic support for string operands in CPU DSL
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| Tue, 12 Feb 2019 09:58:04 -0800 |
Michael Pavone |
Integration of new Z80 core is sort of working now
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| Sun, 10 Feb 2019 11:58:23 -0800 |
Michael Pavone |
Initial attempt at interrupts in new Z80 core and integrating it into main executable
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| Sat, 09 Feb 2019 11:34:31 -0800 |
Michael Pavone |
Optimization to memory access in new Z80 core
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| Fri, 08 Feb 2019 23:09:58 -0800 |
Michael Pavone |
Added option to CPU DSL to produce a threaded interpreter using computed goto
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| Thu, 07 Feb 2019 09:43:25 -0800 |
Michael Pavone |
Added init functions to z80_util.c so new Z80 core is closer to a drop in replacement for the old one
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| Wed, 06 Feb 2019 09:13:24 -0800 |
Michael Pavone |
Optimization of flag calculation for flags that just copy a bit from the result in CPU DSL
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| Wed, 06 Feb 2019 08:54:09 -0800 |
Michael Pavone |
Fixes to DAA, SCF and CCF to pass ZEXALL in new Z80 core
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| Tue, 05 Feb 2019 19:29:54 -0800 |
Michael Pavone |
Fixed half-carry flag calcuation for adc/sbc in new Z80 core
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| Mon, 04 Feb 2019 23:46:35 -0800 |
Michael Pavone |
Fixed CPI/CPD/CPIR/CPDR in new Z80 core
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