| Sun, 02 Mar 2014 14:45:36 -0800 |
Michael Pavone |
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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| Mon, 23 Jun 2014 11:46:56 -0400 |
Mike Pavone |
Save and restore guest address in the write function for a code memory chunk in the "slow" path for inconvenient host addresses. This fixes an intermittent crash on OSX in the code that checks whether the memory written may contain code
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| Mon, 23 Jun 2014 11:05:55 -0400 |
Mike Pavone |
Fix x86_rrindex_sizedir. Pass the correct scale to mov_rindexr in gen_mem_fun. BlastEm now sort of works on OS X. Runs reliably from lldb, but only intermittently from the shell
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| Tue, 17 Jun 2014 01:50:29 -0400 |
Mike Pavone |
blastem builds and almost works on OS X now
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| Mon, 24 Feb 2014 01:30:16 -0800 |
Mike Pavone |
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
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| Mon, 24 Feb 2014 00:50:15 -0800 |
Mike Pavone |
Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
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| Mon, 24 Feb 2014 00:39:02 -0800 |
Michael Pavone |
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
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| Wed, 19 Feb 2014 00:22:27 -0800 |
Michael Pavone |
Apart from the Z80 core, BlastEm now supports 32-bit x86
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| Tue, 18 Feb 2014 21:37:31 -0800 |
Michael Pavone |
Initial work on the x86-32 target
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| Tue, 18 Feb 2014 20:32:10 -0800 |
Michael Pavone |
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
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| Mon, 17 Feb 2014 19:58:37 -0800 |
Michael Pavone |
Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done.
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| Sun, 16 Feb 2014 19:54:27 -0800 |
Michael Pavone |
Generate handle_cycle_limit at runtime so it can use the generated save/load_context functions. Since the hand written versions of save/load are no longer used they have been removed.
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| Sun, 16 Feb 2014 19:21:39 -0800 |
Michael Pavone |
Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions
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| Sun, 16 Feb 2014 18:17:59 -0800 |
Michael Pavone |
Generate retrans_stub at runtime so it can use the generated save/load_context functions
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| Sun, 16 Feb 2014 16:50:10 -0800 |
Michael Pavone |
Removed old debug print function that is no longer needed
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| Sat, 15 Feb 2014 22:35:18 -0800 |
Michael Pavone |
Get rid of the native stack option the 68K core. Trying to make it work with code that messes with the stack is not worth the trouble.
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| Sat, 15 Feb 2014 21:25:36 -0800 |
Michael Pavone |
Generate m68k_start_context at runtime so it can use the generated load_context and save_context
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| Fri, 14 Feb 2014 19:56:18 -0800 |
Michael Pavone |
Generate save_context and load_context functions at runtime
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| Sun, 09 Feb 2014 00:42:43 -0800 |
Mike Pavone |
Properly handle jmp instructions in the debugger next command
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| Thu, 03 Oct 2013 21:21:47 -0700 |
Mike Pavone |
Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing
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| Tue, 10 Sep 2013 23:31:08 -0700 |
Mike Pavone |
Added copyright notice to source files and added GPL license text in COPYING
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| Sun, 08 Sep 2013 20:46:25 -0700 |
Mike Pavone |
Fix bit instruction timing
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| Sat, 20 Jul 2013 23:40:28 -0700 |
Mike Pavone |
Fix performance regression from stop instruction work
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| Fri, 19 Jul 2013 22:44:00 -0700 |
Mike Pavone |
Implement 68K stop instruction
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| Wed, 17 Jul 2013 00:23:45 -0700 |
Mike Pavone |
Fix sign flag on swap
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| Wed, 17 Jul 2013 00:18:28 -0700 |
Mike Pavone |
Fix carry flag on rotate when the register provided rotate bit count is exactly 32
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| Tue, 16 Jul 2013 23:16:50 -0700 |
Mike Pavone |
Fix 68K test harness
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| Sat, 29 Jun 2013 17:15:08 -0700 |
Mike Pavone |
Add support for loading GST format savestates
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| Tue, 25 Jun 2013 23:18:57 -0700 |
Mike Pavone |
Use the registers that were freed up by the memory map function changes
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| Tue, 21 May 2013 23:29:48 -0700 |
Mike Pavone |
Finish SRAM support for games without a SEGA mapper
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| Tue, 21 May 2013 22:08:59 -0700 |
Mike Pavone |
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
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| Tue, 21 May 2013 19:26:20 -0700 |
Mike Pavone |
Refactor code gen for read/write functions
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| Tue, 21 May 2013 01:10:04 -0700 |
Mike Pavone |
m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S
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| Tue, 21 May 2013 00:56:56 -0700 |
Mike Pavone |
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
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| Sat, 18 May 2013 11:44:42 -0700 |
Mike Pavone |
Mostly working runtime generation of memory map read/write functions
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| Sun, 12 May 2013 01:34:17 -0700 |
Mike Pavone |
Fix retrun address calculation for CHK exceptions
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| Sat, 11 May 2013 21:19:31 -0700 |
Mike Pavone |
Don't update interrupt mask on non-interrupt exceptions
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| Sat, 11 May 2013 01:38:57 -0700 |
Mike Pavone |
Port instruction retranslation improvements from Z80 core to M68K core
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| Thu, 25 Apr 2013 21:01:11 -0700 |
Mike Pavone |
Get Z80 core working for simple programs
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| Sun, 21 Apr 2013 16:44:46 -0700 |
Mike Pavone |
Fix overflow detection in divs. Fix negative immediate source for divs
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| Sun, 21 Apr 2013 13:00:34 -0700 |
Mike Pavone |
Implement CHK instruction (not fully tested).
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| Sun, 21 Apr 2013 11:42:45 -0700 |
Mike Pavone |
Fixed a couple bugs in roxl/roxr. X flag wasn't being saved properly and rotates of more than 31 bits were messed up as the X flag was being thrown away between the first 31 bits of rotate and the rest.
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| Sat, 20 Apr 2013 17:41:07 -0700 |
Mike Pavone |
Fix muls with a negative immediate source.
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| Sat, 20 Apr 2013 16:53:01 -0700 |
Mike Pavone |
Fix modulo on bit operations with a memory destination
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| Sat, 20 Apr 2013 14:36:41 -0700 |
Mike Pavone |
Fix overflow flag behavior for lsl/lsr/asr
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| Sat, 20 Apr 2013 00:36:50 -0700 |
Mike Pavone |
Fix autoincrement on a7 when used as a destination in a byte sized instruction
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| Fri, 19 Apr 2013 21:36:54 -0700 |
Mike Pavone |
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
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| Tue, 16 Apr 2013 22:29:00 -0700 |
Mike Pavone |
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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| Tue, 16 Apr 2013 09:31:21 -0700 |
Mike Pavone |
Small bit of cleanup
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| Sun, 27 Jan 2013 13:07:26 -0800 |
Mike Pavone |
Fix movem reg to mem for certain addressing modes
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| Sat, 26 Jan 2013 02:47:26 -0800 |
Mike Pavone |
Flag fixes for div, negx and not
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| Sat, 26 Jan 2013 01:33:32 -0800 |
Mike Pavone |
Tweaks to make blastem compatible with m68k-tester
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| Fri, 25 Jan 2013 18:39:22 -0800 |
Mike Pavone |
Fix overflow flag on ASL
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| Thu, 17 Jan 2013 20:00:07 -0800 |
Mike Pavone |
Add instruction address logging to translator and support for reading an address log to the disassembler
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| Thu, 17 Jan 2013 08:19:29 -0800 |
Mike Pavone |
Implement pc indexed mode as move dst
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| Wed, 16 Jan 2013 22:40:56 -0800 |
Mike Pavone |
Implement ABCD an SBCD. Fix BTEST with register source.
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| Tue, 15 Jan 2013 00:14:36 -0800 |
Mike Pavone |
Implement support for self-modifying code
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| Mon, 14 Jan 2013 21:56:54 -0800 |
Mike Pavone |
Prep work for handling games that modify code in RAM
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| Sun, 13 Jan 2013 23:48:04 -0800 |
Mike Pavone |
Fix movem.w when dest is register list
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| Sun, 13 Jan 2013 23:06:26 -0800 |
Mike Pavone |
Fix return address for areg displacement mode JSR
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