log cpu_dsl.py @ 2580:939b818df589

age author description
Sat, 08 Feb 2025 11:40:42 -0800 Michael Pavone Get 68K interrupts working in new CPU core
Fri, 07 Feb 2025 19:58:20 -0800 Michael Pavone Fix rol and ror in new CPU core
Fri, 07 Feb 2025 08:57:24 -0800 Michael Pavone WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Sat, 25 Jan 2025 21:25:01 -0800 Michael Pavone Implement exg, muls and mulu in new 68K core