log cpu_dsl.py @ 2578:9b01541cbd60

age author description
Fri, 07 Feb 2025 19:58:20 -0800 Michael Pavone Fix rol and ror in new CPU core
Fri, 07 Feb 2025 08:57:24 -0800 Michael Pavone WIP changes to new CPU core for rotate instructions and to get interrupts more functional
Sat, 25 Jan 2025 21:25:01 -0800 Michael Pavone Implement exg, muls and mulu in new 68K core
Tue, 16 Jul 2024 20:21:08 -0700 Michael Pavone Partially functional asr/asl implementations in new 68K core
Tue, 30 Apr 2024 22:32:08 -0700 Michael Pavone Get blastem compiling with new 68K core
Tue, 30 Apr 2024 00:02:14 -0700 Michael Pavone Make some progress on compiling full emulator with new 68K core
Mon, 29 Apr 2024 22:57:33 -0700 Michael Pavone Fix constant propagation for sext instruction
Thu, 07 Mar 2024 00:53:11 -0800 Michael Pavone Implement lea and pea in new 68K core