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log backend_x86.c @ 2134:9caebcfeac72

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age author description
Fri, 18 Mar 2022 20:49:07 -0700 Michael Pavone Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Thu, 17 Mar 2022 22:41:42 -0700 Michael Pavone Remove use of get_native_pointer in 68K instruction decoding in preparation for word RAM interleaving
Sun, 13 Feb 2022 22:52:52 -0800 Michael Pavone Fix handling of ram code flag offset calculation for ranges that are not an even multiple of the code flag page size
Sun, 30 Jan 2022 19:56:09 -0800 Michael Pavone Fix error in code write detection introduced from "wide" jcc change segacd
Tue, 18 Jan 2022 00:03:50 -0800 Michael Pavone Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM segacd
Sun, 07 Mar 2021 22:43:51 -0800 Michael Pavone Fix bug in handling of MMAP_CODE regions smaller than 16KB
Sun, 31 Dec 2017 14:08:47 -0800 Michael Pavone Fix accidental add to RSP with SZ_D and SZ_PTR. Using SZ_D breakse when the stack is located outside of the 32-bit addressable range
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