| Tue, 18 Feb 2014 21:37:31 -0800 |
Michael Pavone |
Initial work on the x86-32 target
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| Thu, 13 Feb 2014 00:10:36 -0800 |
Mike Pavone |
Properly sync hardware when frame end is reached during DMA
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| Wed, 12 Feb 2014 23:25:48 -0800 |
Mike Pavone |
Update version number
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| Wed, 12 Feb 2014 23:21:47 -0800 |
Mike Pavone |
Remove defines from blastem.c that had been moved to blastem.h
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| Tue, 11 Feb 2014 21:53:31 -0800 |
Mike Pavone |
Move debugging code outside of main source file
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| Sun, 09 Feb 2014 17:16:55 -0800 |
Mike Pavone |
Added step and step-over debugger commands. step-over is like next except it doesn't follow conditional branches to lower addresses. This makes it useful for advancing to the end of a loop. Also fixed a bug in next introduced by the refactor.
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| Sun, 09 Feb 2014 12:35:27 -0800 |
Mike Pavone |
Refactor debugger next command
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| Sun, 09 Feb 2014 10:29:29 -0800 |
Mike Pavone |
Properly handle dbcc, rtr and rte in the debugger next command
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| Sun, 09 Feb 2014 00:42:43 -0800 |
Mike Pavone |
Properly handle jmp instructions in the debugger next command
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| Sat, 08 Feb 2014 23:37:09 -0800 |
Mike Pavone |
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
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| Thu, 06 Feb 2014 10:04:31 -0800 |
Michael Pavone |
Add a zp command to the 68K debugger to allow printing Z80 registers while in the 68K debugger
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| Mon, 03 Feb 2014 09:18:10 -0800 |
Michael Pavone |
Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff.
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| Mon, 06 Jan 2014 22:54:05 -0800 |
Michael Pavone |
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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| Tue, 29 Oct 2013 19:11:45 -0700 |
Mike Pavone |
Use OpenGL by default. Add OpenGL switch to help text
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| Mon, 28 Oct 2013 21:48:46 -0700 |
Mike Pavone |
Extract function to determine executable directory from load_config so it can be used elsewhere
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| Sun, 27 Oct 2013 01:29:50 -0700 |
Mike Pavone |
Basic OpenGL rendering is working
opengl
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| Sat, 26 Oct 2013 22:38:47 -0700 |
Mike Pavone |
Update opengl branch from default. Fix build breakage unrelated to merge
opengl
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| Tue, 01 Oct 2013 23:51:16 -0700 |
Mike Pavone |
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
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| Wed, 18 Sep 2013 19:10:54 -0700 |
Mike Pavone |
Theoretically more correct timing of Z80 bus request
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| Sun, 15 Sep 2013 22:20:43 -0700 |
Mike Pavone |
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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| Fri, 13 Sep 2013 19:22:46 -0700 |
Mike Pavone |
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
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| Wed, 11 Sep 2013 19:26:35 -0700 |
Mike Pavone |
Fix argument handling so that the rom filename does not need to be specified first
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| Tue, 10 Sep 2013 23:31:08 -0700 |
Mike Pavone |
Added copyright notice to source files and added GPL license text in COPYING
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| Tue, 10 Sep 2013 20:36:05 -0700 |
Mike Pavone |
Added version flag
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| Tue, 10 Sep 2013 20:32:59 -0700 |
Mike Pavone |
Added -h help text option
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| Sun, 08 Sep 2013 20:47:01 -0700 |
Mike Pavone |
Remove extra 68K/VDP cycle sync
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| Mon, 02 Sep 2013 00:20:56 -0700 |
Mike Pavone |
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
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| Sun, 01 Sep 2013 14:27:17 -0700 |
Mike Pavone |
Merge
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| Fri, 26 Jul 2013 19:55:04 -0700 |
Mike Pavone |
Added support for saving savestates. Added gst savestate format test harness
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| Sun, 01 Sep 2013 12:11:28 -0700 |
Mike Pavone |
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
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