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log cpu_dsl.py @ 2704:c5dce4284e69

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age author description
Sun, 06 Jul 2025 15:18:02 -0700 Michael Pavone Fix a couple of bugs in CPU DSL found while working on uPD78K/II core
Wed, 26 Mar 2025 01:20:09 -0700 Michael Pavone Fix small bug in goto dispatch output of CPU dsl
Sat, 15 Mar 2025 23:15:05 -0700 Michael Pavone Implement breakpoints in new 68K core
Sat, 08 Mar 2025 20:20:23 -0800 Michael Pavone Fix mulu nflag when compiling with optimization enabled
Fri, 07 Mar 2025 23:40:58 -0800 Michael Pavone Memory access optimizaiton in new 68K core that gives a modest speed bump on average and will allow low-cost watchpoints
Mon, 24 Feb 2025 23:38:32 -0800 Michael Pavone Fix flags for mulu/muls in new 68K core
Sat, 22 Feb 2025 01:31:51 -0800 Michael Pavone Fix V flag for asl in new CPU core
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