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log gen_x86.h @ 418:dbf4e1c86f3c

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Sat, 18 May 2013 11:44:42 -0700 Mike Pavone Mostly working runtime generation of memory map read/write functions
Sun, 28 Apr 2013 13:45:17 -0700 Mike Pavone Implement EX, EXX and RST in Z80 core
Fri, 25 Jan 2013 18:39:22 -0800 Mike Pavone Fix overflow flag on ASL
Thu, 03 Jan 2013 22:07:40 -0800 Mike Pavone Implement MULU/MULS and DIVU/DIVS
Mon, 31 Dec 2012 20:09:09 -0800 Mike Pavone Implement most of the "X" instructions
Sat, 29 Dec 2012 21:10:07 -0800 Mike Pavone Implement the rest of the bit instructions
Fri, 28 Dec 2012 17:57:43 -0800 Mike Pavone Implement scc (untested)
Wed, 26 Dec 2012 11:09:04 -0800 Mike Pavone Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Sat, 22 Dec 2012 21:37:25 -0800 Mike Pavone Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
Fri, 21 Dec 2012 01:00:52 -0800 Mike Pavone Implement more instructions and address modes
Wed, 19 Dec 2012 20:23:59 -0800 Mike Pavone Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Sat, 15 Dec 2012 23:01:32 -0800 Mike Pavone Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Wed, 12 Dec 2012 23:21:11 -0800 Mike Pavone Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Tue, 04 Dec 2012 19:13:12 -0800 Mike Pavone M68K to x86 translation works for a limited subset of instructions and addressing modes
Tue, 27 Nov 2012 22:43:32 -0800 Mike Pavone Make x86 generator generic with respect to operand size for immediate parameters.
Tue, 27 Nov 2012 09:28:13 -0800 Mike Pavone x86 code gen, initial work on translator
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