| Wed, 13 Sep 2017 21:13:11 -0700 |
Michael Pavone |
Push correct PC onto stack on divide by zero for pc-relative case
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| Wed, 13 Sep 2017 21:06:25 -0700 |
Michael Pavone |
Preserve original address when retranslating instructions instead of switching to the lowest alias
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| Wed, 06 Sep 2017 23:10:11 -0700 |
Michael Pavone |
Properly clear trace mode on interrupt or other exception. Fix NBCD with memory destination
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| Fri, 11 Aug 2017 18:43:48 -0700 |
Michael Pavone |
Avoid generating an instruction that would require a REX prefix when a7 is used as a byte-wide source operand in 32-bit builds. Fixes a fatal error in Dragon's Fury when entering the option menu in a 32-bit build
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| Fri, 26 May 2017 19:18:19 -0700 |
Michael Pavone |
Avoid splitting m68k_check_cycles_int_latch code across memory chunks since it expects a byte-sized jump offset. Avoid an unnecessary m68k_check_cycles_int_latch for register to register moves
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| Tue, 23 May 2017 21:07:56 -0700 |
Michael Pavone |
Fix interrupt latency for move.l with memory destination
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| Fri, 19 May 2017 20:27:35 -0700 |
Michael Pavone |
Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
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| Wed, 26 Apr 2017 21:55:12 -0700 |
Michael Pavone |
Fix timing for branch not taken case in the M68K BCC intruction
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| Mon, 24 Apr 2017 20:49:31 -0700 |
Michael Pavone |
Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
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| Tue, 28 Mar 2017 09:39:54 -0700 |
Michael Pavone |
Fix exit trace mode edge case. Call do_sync if trace mode bit is changed in eori sr
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| Tue, 28 Mar 2017 00:13:35 -0700 |
Michael Pavone |
Implemented M68K trace mode. Some edge cases/SR update paths still need work
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| Wed, 22 Mar 2017 22:16:39 -0700 |
Michael Pavone |
Fix SBCD edge cases to pass Flamewing's test ROM. Could use some cleanup to produce better code for the SBCD case, but produces correct results now
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