| Sat, 15 Feb 2025 01:35:38 -0800 |
Michael Pavone |
Fix issues in CPU DSL that caused regressions in Z80 core
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| Thu, 13 Feb 2025 02:18:30 -0800 |
Michael Pavone |
Basic emscripten support
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| Sun, 09 Feb 2025 22:46:07 -0800 |
Michael Pavone |
Fix masking issue in CPU DSL adc fixing issues in 68K core addx and abcd
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| Sun, 09 Feb 2025 22:37:41 -0800 |
Michael Pavone |
Fix masking issues in CPU DSL sext instruction
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| Sun, 09 Feb 2025 22:13:24 -0800 |
Michael Pavone |
Fix bug in sbc in CPU DSL impacting 68K subx and sbcd
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| Sun, 09 Feb 2025 18:07:40 -0800 |
Michael Pavone |
Fix some rotate instruction issues in new 68K core
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| Sun, 09 Feb 2025 16:54:38 -0800 |
Michael Pavone |
Fix regression in better unimplemented instruction error in CPU dsl
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| Sun, 09 Feb 2025 14:15:22 -0800 |
Michael Pavone |
Cut down on code bloat in 68K core a little
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| Sun, 09 Feb 2025 02:56:50 -0800 |
Michael Pavone |
Low confidence fix for edge case in CPU DSL not currently hit
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| Sat, 08 Feb 2025 20:04:18 -0800 |
Michael Pavone |
Implement divs and divu in new CPU core
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| Sat, 08 Feb 2025 12:51:35 -0800 |
Michael Pavone |
Better unimplemented instruction error message in CPU DSL
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| Sat, 08 Feb 2025 11:40:42 -0800 |
Michael Pavone |
Get 68K interrupts working in new CPU core
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| Fri, 07 Feb 2025 19:58:20 -0800 |
Michael Pavone |
Fix rol and ror in new CPU core
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| Fri, 07 Feb 2025 08:57:24 -0800 |
Michael Pavone |
WIP changes to new CPU core for rotate instructions and to get interrupts more functional
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