log

age author description
Wed, 30 Jan 2019 09:32:01 -0800 Michael Pavone Better error reporting when an instruction is given an insufficient number of parameters
Tue, 29 Jan 2019 23:56:48 -0800 Michael Pavone Implement 16-bit addition in new Z80 core along with necessary CPU DSL fixes to make them work right
Tue, 29 Jan 2019 22:17:15 -0800 Michael Pavone fix half-carry for or and xor in new Z80 core
Tue, 29 Jan 2019 22:16:57 -0800 Michael Pavone Implement parity flag calculation type
Tue, 29 Jan 2019 21:29:08 -0800 Michael Pavone Fix ED prefix in new Z80 core
Tue, 29 Jan 2019 21:26:39 -0800 Michael Pavone Actually correct overflow flag calculation in CPU DSL
Mon, 28 Jan 2019 22:56:43 -0800 Michael Pavone Fix sbc and implement carry/overflow flags for it in CPU DSL
Mon, 28 Jan 2019 22:49:02 -0800 Michael Pavone Implementation of carry/overflow flags for adc instructions in CPU DSL
Mon, 28 Jan 2019 22:37:46 -0800 Michael Pavone Fixed flag calculation for sub instructions in CPU DSL
Mon, 28 Jan 2019 21:30:23 -0800 Michael Pavone Less broken flag calulcation for sub instructions in CPU DSL
Mon, 28 Jan 2019 21:16:41 -0800 Michael Pavone Initial checkin of new WIP Z80 core using CPU DSL
Mon, 28 Jan 2019 21:15:27 -0800 Michael Pavone Initial stab at overflow flag implementation in CPU DSL. Probably broken for subtraction
Mon, 28 Jan 2019 20:54:55 -0800 Michael Pavone First stab at carry and half-carry calculation in CPU DSL
Mon, 28 Jan 2019 19:24:04 -0800 Michael Pavone Fix zero flag calculation in CPU DSL
Sun, 27 Jan 2019 14:37:37 -0800 Michael Pavone Implemented sbc instruction in CPU DSL