log

age author description
Sun, 20 Mar 2022 13:55:31 -0700 Michael Pavone Fix DRS and DTS bits of CDD status
Sat, 19 Mar 2022 15:50:45 -0700 Michael Pavone Fix some dynarec code invalidation issues
Sat, 19 Mar 2022 00:42:05 -0700 Michael Pavone Fix a crash regression from word RAM interleave changes
Sat, 19 Mar 2022 00:14:07 -0700 Michael Pavone Fix regresion on mcd-verificator CDC flags test
Fri, 18 Mar 2022 21:55:30 -0700 Michael Pavone Can now pass all CDC DMA3 tests in mcd-verificator
Fri, 18 Mar 2022 20:49:07 -0700 Michael Pavone Implement word RAM interleaving in 1M mode, now passes mcd-verificator word RAM tests
Thu, 17 Mar 2022 22:41:42 -0700 Michael Pavone Remove use of get_native_pointer in 68K instruction decoding in preparation for word RAM interleaving
Thu, 17 Mar 2022 22:40:49 -0700 Michael Pavone Add some weak labels for a few exception vectors in disassembler
Wed, 16 Mar 2022 00:16:36 -0700 Michael Pavone Improve CDC decode timing accuracy
Tue, 15 Mar 2022 08:58:04 -0700 Michael Pavone Emulate CDC sync detection and sync insertion rather than relying on external knowledge about sector offset
Sun, 13 Mar 2022 11:49:07 -0700 Michael Pavone Pause word RAM DMA while word RAM is switched to main CPU
Sun, 13 Mar 2022 11:36:06 -0700 Michael Pavone Fix some issues with PCM dma/CPU write conflicts
Sat, 12 Mar 2022 22:54:41 -0800 Michael Pavone Fix one more test in mcd-verificator CDC DMA1
Fri, 11 Mar 2022 22:41:04 -0800 Michael Pavone Fix embarassing typo
Fri, 11 Mar 2022 20:57:23 -0800 Michael Pavone Fix Windows build