log

age author description
Fri, 23 Feb 2024 23:08:45 -0800 Michael Pavone Save SR before saving result in test generator. Move instructions update flags on 68K
Fri, 23 Feb 2024 20:22:00 -0800 Michael Pavone Fix handling of zero timer value
Fri, 23 Feb 2024 01:16:38 -0800 Michael Pavone Initial work on emulating the YMZ263B in the Copera
Wed, 21 Feb 2024 23:42:19 -0800 Michael Pavone Initial work on Copera emulation
Wed, 21 Feb 2024 20:34:52 -0800 Michael Pavone Avoid spawning secondary windows right on top of the main one
Wed, 21 Feb 2024 20:25:06 -0800 Michael Pavone Fix libretro build
Wed, 21 Feb 2024 20:09:11 -0800 Michael Pavone Implement movep in new 68K core
Mon, 19 Feb 2024 23:00:49 -0800 Michael Pavone Fix bit instruction penalty cycle check for cases when bit number is out of range
Mon, 19 Feb 2024 22:52:21 -0800 Michael Pavone Implement bit instructions in new CPU core
Mon, 19 Feb 2024 18:14:56 -0800 Michael Pavone Implement cmp instructions in new 68K core
Mon, 19 Feb 2024 18:14:12 -0800 Michael Pavone Allow more if statements to be constant folded in CPU DSL
Mon, 19 Feb 2024 17:55:45 -0800 Michael Pavone Fix implementation of cmp for 32-bit operands or when operation size is smaller than the size of the operands
Sun, 18 Feb 2024 22:34:51 -0800 Michael Pavone Fix cycle counts for a number of instructions in new 68K core
Sun, 18 Feb 2024 22:30:16 -0800 Michael Pavone Avoid address errors in generated tests
Thu, 15 Feb 2024 21:49:17 -0800 Michael Pavone Fix some issues in new 68K core and add implementations of negx and clr instructions