Thu, 02 May 2013 22:28:40 -0700 |
Mike Pavone |
Implement LDD and LDDR
|
Thu, 02 May 2013 22:26:47 -0700 |
Mike Pavone |
Implement LDI
|
Thu, 02 May 2013 22:21:41 -0700 |
Mike Pavone |
Protect debug prints for busreq/reset regs with appropriate macros
|
Thu, 02 May 2013 22:18:33 -0700 |
Mike Pavone |
Fix decoding of CP.
|
Thu, 02 May 2013 22:18:22 -0700 |
Mike Pavone |
Fix IX/IY displace modes. Fix check for registers requiring REX.
|
Thu, 02 May 2013 21:54:04 -0700 |
Mike Pavone |
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
|
Thu, 02 May 2013 00:10:24 -0700 |
Mike Pavone |
Don't mix *H regs with the REX prefix
|
Wed, 01 May 2013 23:12:29 -0700 |
Mike Pavone |
Fix some more retranslation bugs in the Z80 core
|
Wed, 01 May 2013 20:15:33 -0700 |
Mike Pavone |
Add -n flag for disabling the Z80 core
|
Wed, 01 May 2013 20:09:53 -0700 |
Mike Pavone |
Fix a crash bug in instruction retranslation
|
Tue, 30 Apr 2013 20:36:15 -0700 |
Mike Pavone |
Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
|
Tue, 30 Apr 2013 20:33:30 -0700 |
Mike Pavone |
Implement ld to and from the I and R registers
|
Tue, 30 Apr 2013 01:00:10 -0700 |
Mike Pavone |
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
|
Tue, 30 Apr 2013 00:39:31 -0700 |
Mike Pavone |
Initial stab at integartiong Z80 core
|
Tue, 30 Apr 2013 00:39:20 -0700 |
Mike Pavone |
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
|
Tue, 30 Apr 2013 00:37:30 -0700 |
Mike Pavone |
Fix infinite loop in Z80 disassembler
|
Mon, 29 Apr 2013 23:02:39 -0700 |
Mike Pavone |
Implement CCF and SCF
|
Mon, 29 Apr 2013 22:58:45 -0700 |
Mike Pavone |
Fix decoding of address in JP and JPCC instructions in the Z80 core
|
Mon, 29 Apr 2013 22:52:05 -0700 |
Mike Pavone |
Properly handle wrapping around to 0 in translate_z80_stream
|
Mon, 29 Apr 2013 22:37:47 -0700 |
Mike Pavone |
Fix bug in end condition inside translate_z80_stream.
|
Mon, 29 Apr 2013 22:32:21 -0700 |
Mike Pavone |
Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
|
Mon, 29 Apr 2013 21:46:48 -0700 |
Mike Pavone |
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
|
Mon, 29 Apr 2013 01:14:24 -0700 |
Mike Pavone |
Fix target cycle count after 68K interrupt
|
Mon, 29 Apr 2013 00:59:50 -0700 |
Mike Pavone |
Implemented basic interrupt support in Z80 core.
|
Mon, 29 Apr 2013 00:59:32 -0700 |
Mike Pavone |
Forgot to commit zruntime a while back, adding it now.
|
Sun, 28 Apr 2013 23:25:18 -0700 |
Mike Pavone |
Implement ADC and SBC in Z80 core (untested)
|
Sun, 28 Apr 2013 22:41:30 -0700 |
Mike Pavone |
Implement rotation and bit set/reset instructions (untested).
|
Sun, 28 Apr 2013 21:00:27 -0700 |
Mike Pavone |
Implement RETCC in Z80 core.
|
Sun, 28 Apr 2013 21:00:16 -0700 |
Mike Pavone |
Implement cartridge rom loading in transz80
|
Sun, 28 Apr 2013 18:53:43 -0700 |
Mike Pavone |
Implement cycle limit in Z80 core.
|
Sun, 28 Apr 2013 14:32:45 -0700 |
Mike Pavone |
Implement EI, DI and IM in the Z80 core
|
Sun, 28 Apr 2013 14:05:02 -0700 |
Mike Pavone |
Implemente CP (untested)
|
Sun, 28 Apr 2013 13:45:17 -0700 |
Mike Pavone |
Implement EX, EXX and RST in Z80 core
|
Sun, 28 Apr 2013 13:45:00 -0700 |
Mike Pavone |
Add header dependencies to offsets
|
Fri, 26 Apr 2013 22:27:17 -0700 |
Mike Pavone |
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
|
Fri, 26 Apr 2013 09:51:57 -0700 |
Mike Pavone |
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
|
Fri, 26 Apr 2013 09:51:13 -0700 |
Mike Pavone |
Added key to save Z80 RAM to a file
|
Thu, 25 Apr 2013 22:49:36 -0700 |
Mike Pavone |
Implement more Z80 instructions (untested)
|
Thu, 25 Apr 2013 21:01:11 -0700 |
Mike Pavone |
Get Z80 core working for simple programs
|
Mon, 22 Apr 2013 23:56:13 -0700 |
Mike Pavone |
Add shadow/higlight info to debug renderer
|
Mon, 22 Apr 2013 23:34:39 -0700 |
Mike Pavone |
Less broken implementation of shadow/highlight
|
Mon, 22 Apr 2013 21:24:50 -0700 |
Mike Pavone |
Shadow and higlight operators were switched
|
Mon, 22 Apr 2013 20:13:07 -0700 |
Mike Pavone |
Added todo list
|
Mon, 22 Apr 2013 19:39:38 -0700 |
Mike Pavone |
Implemented shadow hilight mode.
|
Sun, 21 Apr 2013 19:12:48 -0700 |
Mike Pavone |
Improve color rendering accuracy and optimize SDL renderer a bit
|
Sun, 21 Apr 2013 16:44:46 -0700 |
Mike Pavone |
Fix overflow detection in divs. Fix negative immediate source for divs
|
Sun, 21 Apr 2013 16:44:10 -0700 |
Mike Pavone |
Added test cases for divs/divu and added divide by zero handler to test generator
|
Sun, 21 Apr 2013 13:00:34 -0700 |
Mike Pavone |
Implement CHK instruction (not fully tested).
|
Sun, 21 Apr 2013 11:42:45 -0700 |
Mike Pavone |
Fixed a couple bugs in roxl/roxr. X flag wasn't being saved properly and rotates of more than 31 bits were messed up as the X flag was being thrown away between the first 31 bits of rotate and the rest.
|
Sun, 21 Apr 2013 11:40:18 -0700 |
Mike Pavone |
Added testcases for move and roxl/roxr. Made some small improvements to test tools.
|
Sat, 20 Apr 2013 17:41:07 -0700 |
Mike Pavone |
Fix muls with a negative immediate source.
|
Sat, 20 Apr 2013 17:32:34 -0700 |
Mike Pavone |
Added testcases for muls, mulu, abcd and sbcd
|
Sat, 20 Apr 2013 16:53:01 -0700 |
Mike Pavone |
Fix modulo on bit operations with a memory destination
|
Sat, 20 Apr 2013 15:14:47 -0700 |
Mike Pavone |
Add support for picking random numbers in a larger range in test generator. Add support for running a subset of tests in runner. Added testcases for bit and rotate instructions.
|
Sat, 20 Apr 2013 14:36:41 -0700 |
Mike Pavone |
Fix overflow flag behavior for lsl/lsr/asr
|
Sat, 20 Apr 2013 00:36:50 -0700 |
Mike Pavone |
Fix autoincrement on a7 when used as a destination in a byte sized instruction
|
Sat, 20 Apr 2013 00:29:14 -0700 |
Mike Pavone |
Added testcases file. Some fixes to test generator for dealing with indexed mode with base and index reg the same. Added support for blastem headless mode in test runner.
|
Fri, 19 Apr 2013 21:36:54 -0700 |
Mike Pavone |
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
|
Fri, 19 Apr 2013 21:36:00 -0700 |
Mike Pavone |
Added headless flag to avoid initializing SDL and opening a window when running tests.
|
Fri, 19 Apr 2013 09:29:37 -0700 |
Mike Pavone |
Add test generator, builder and runner
|
Tue, 16 Apr 2013 22:29:00 -0700 |
Mike Pavone |
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
|
Tue, 16 Apr 2013 09:38:30 -0700 |
Mike Pavone |
Fixed up trans for changes to translate_m68k_stream, but still need to deal with missing callbacks.
|
Tue, 16 Apr 2013 09:31:21 -0700 |
Mike Pavone |
Small bit of cleanup
|
Sun, 27 Jan 2013 13:07:26 -0800 |
Mike Pavone |
Fix movem reg to mem for certain addressing modes
|
Sat, 26 Jan 2013 02:47:26 -0800 |
Mike Pavone |
Flag fixes for div, negx and not
|
Sat, 26 Jan 2013 01:33:32 -0800 |
Mike Pavone |
Tweaks to make blastem compatible with m68k-tester
|
Fri, 25 Jan 2013 18:39:22 -0800 |
Mike Pavone |
Fix overflow flag on ASL
|
Wed, 23 Jan 2013 21:54:58 -0800 |
Mike Pavone |
Add support for IY bit instructions to decoder
|
Wed, 23 Jan 2013 21:50:54 -0800 |
Mike Pavone |
Add support for IX bit instructions to decoder
|
Tue, 22 Jan 2013 20:24:14 -0800 |
Mike Pavone |
Add support for 2-byte IY instructions to decoder
|
Tue, 22 Jan 2013 20:21:05 -0800 |
Mike Pavone |
Add support for 2-byte IX instructions to decoder
|
Mon, 21 Jan 2013 21:59:09 -0800 |
Mike Pavone |
Distinguish between 1-byte and 2-byte NOPs
|
Mon, 21 Jan 2013 21:17:52 -0800 |
Mike Pavone |
Add support for bit instructions to decoder
|
Sun, 20 Jan 2013 21:32:13 -0800 |
Mike Pavone |
Add support for EXTD group 2-byte Z80 instructions in decoder
|
Sun, 20 Jan 2013 19:11:24 -0800 |
Mike Pavone |
Add initial stab at Z80 decoder and disassembler
|
Sun, 20 Jan 2013 19:10:29 -0800 |
Mike Pavone |
Add support for breaking into the debugger while game is running
|
Thu, 17 Jan 2013 20:00:07 -0800 |
Mike Pavone |
Add instruction address logging to translator and support for reading an address log to the disassembler
|
Thu, 17 Jan 2013 08:19:29 -0800 |
Mike Pavone |
Implement pc indexed mode as move dst
|
Wed, 16 Jan 2013 22:50:02 -0800 |
Mike Pavone |
Fix 6-button controller emulation
|
Wed, 16 Jan 2013 22:40:56 -0800 |
Mike Pavone |
Implement ABCD an SBCD. Fix BTEST with register source.
|
Tue, 15 Jan 2013 00:14:36 -0800 |
Mike Pavone |
Implement support for self-modifying code
|
Mon, 14 Jan 2013 21:56:54 -0800 |
Mike Pavone |
Prep work for handling games that modify code in RAM
|
Mon, 14 Jan 2013 20:23:17 -0800 |
Mike Pavone |
Fixes for direct color dma stuff
|
Mon, 14 Jan 2013 02:13:14 -0800 |
Mike Pavone |
Small fix to bg drawing that yields the proper res for direct color DMA
|
Mon, 14 Jan 2013 02:03:35 -0800 |
Mike Pavone |
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
|
Sun, 13 Jan 2013 23:48:04 -0800 |
Mike Pavone |
Fix movem.w when dest is register list
|
Sun, 13 Jan 2013 23:06:26 -0800 |
Mike Pavone |
Fix return address for areg displacement mode JSR
|
Sun, 13 Jan 2013 16:11:28 -0800 |
Mike Pavone |
Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
|
Sun, 13 Jan 2013 15:55:43 -0800 |
Mike Pavone |
Add ability to print out current 68K cycle in debugger
|
Sun, 13 Jan 2013 13:01:13 -0800 |
Mike Pavone |
Fix a bunch of bugs in the CPU core, add a 68K debugger
|
Wed, 09 Jan 2013 22:31:07 -0800 |
Mike Pavone |
Fix (a7)+ src when size is byte, fix trap return address, make div with areg src decoded to invalid
|
Wed, 09 Jan 2013 21:41:55 -0800 |
Mike Pavone |
Fix -(a7) dest when size is byte
|
Wed, 09 Jan 2013 21:08:37 -0800 |
Mike Pavone |
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
|
Tue, 08 Jan 2013 09:34:46 -0800 |
Mike Pavone |
Fix rendering of sprites at the top edge of screen
|
Tue, 08 Jan 2013 09:34:24 -0800 |
Mike Pavone |
Fix scc to set reg to 0xFF rather than 1 when the condition is true
|
Sun, 06 Jan 2013 22:45:45 -0800 |
Mike Pavone |
Fix order of reading saved pc and swapping user and system stack pointers
|
Sun, 06 Jan 2013 21:44:54 -0800 |
Mike Pavone |
Make sure we bail out of translation after translating an invalid instruction
|
Sun, 06 Jan 2013 21:42:57 -0800 |
Mike Pavone |
Print a message when we try to run an invalid instruction, not when we try to translate it
|
Sun, 06 Jan 2013 20:49:42 -0800 |
Mike Pavone |
Fix order of SR and PC saved in an exception stack frame
|
Sun, 06 Jan 2013 18:31:17 -0800 |
Mike Pavone |
Implement areg displacement mode for jsr
|
Sun, 06 Jan 2013 15:20:23 -0800 |
Mike Pavone |
Implement negx
|
Sun, 06 Jan 2013 14:41:26 -0800 |
Mike Pavone |
Implement movep
|
Sun, 06 Jan 2013 14:00:45 -0800 |
Mike Pavone |
Implement EORI CCR/SR
|
Sun, 06 Jan 2013 13:58:33 -0800 |
Mike Pavone |
Implement RTR
|
Sun, 06 Jan 2013 13:42:13 -0800 |
Mike Pavone |
Fix a bunch of addressing modes in movem when a register list is the destination
|
Sun, 06 Jan 2013 12:17:10 -0800 |
Mike Pavone |
Minor optimization and a cycle count fix to lea
|
Sun, 06 Jan 2013 10:54:45 -0800 |
Mike Pavone |
Initialize status register to proper value on startup
|
Sun, 06 Jan 2013 09:51:15 -0800 |
Mike Pavone |
Added SMD ROM support
|
Sat, 05 Jan 2013 22:59:51 -0800 |
Mike Pavone |
Fix certain address modes with lea when the destination is not a native register
|
Sat, 05 Jan 2013 22:59:06 -0800 |
Mike Pavone |
Small fix to disassembler
|
Sat, 05 Jan 2013 02:46:55 -0800 |
Mike Pavone |
Fix decoding of movep
|
Sat, 05 Jan 2013 02:18:31 -0800 |
Mike Pavone |
Implement more movem modes src
|
Sat, 05 Jan 2013 01:55:11 -0800 |
Mike Pavone |
Implement more address modes for movem dst and fix a missing break statement in translate_m68k_dst
|
Sat, 05 Jan 2013 01:32:40 -0800 |
Mike Pavone |
Fix crash in printf from "crash" function due to lack of clearing rax
|
Sat, 05 Jan 2013 01:31:28 -0800 |
Mike Pavone |
FIx movem when src is reg list and dst is not a areg predec mode
|
Sat, 05 Jan 2013 00:53:50 -0800 |
Mike Pavone |
Fix predec address mode when used as source
|
Fri, 04 Jan 2013 23:52:20 -0800 |
Mike Pavone |
Fix rotate instructions that use a register source. Fix ROXL/ROXR to actually use the appropriate x86 instruction.
|
Fri, 04 Jan 2013 23:25:23 -0800 |
Mike Pavone |
Add cycles for Bcc (needs work, but this changes keeps some ROMs from making the emulator unresponsive)
|
Fri, 04 Jan 2013 23:21:07 -0800 |
Mike Pavone |
Don't use the native call stack for M68K calls by default
|
Fri, 04 Jan 2013 22:51:01 -0800 |
Mike Pavone |
Small fix for bit instructions
|
Fri, 04 Jan 2013 21:47:09 -0800 |
Mike Pavone |
Implement access to Z80 RAM
|
Thu, 03 Jan 2013 22:49:21 -0800 |
Mike Pavone |
Implement TRAP (untested)
|
Thu, 03 Jan 2013 22:07:40 -0800 |
Mike Pavone |
Implement MULU/MULS and DIVU/DIVS
|
Tue, 01 Jan 2013 09:40:17 -0800 |
Mike Pavone |
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
|
Tue, 01 Jan 2013 07:06:57 -0800 |
Mike Pavone |
Make writes to control and data port block when DMA is in progress
|
Tue, 01 Jan 2013 07:04:48 -0800 |
Mike Pavone |
Bail out of disassembly of a particular stream when we hit an invalid instruction
|
Tue, 01 Jan 2013 07:03:52 -0800 |
Mike Pavone |
Add hgignore file
|
Mon, 31 Dec 2012 20:09:09 -0800 |
Mike Pavone |
Implement most of the "X" instructions
|
Mon, 31 Dec 2012 19:17:01 -0800 |
Mike Pavone |
Implement m68k_modified_ret_addr
|
Mon, 31 Dec 2012 18:53:52 -0800 |
Mike Pavone |
Comment out some debug printfs
|
Mon, 31 Dec 2012 18:36:16 -0800 |
Mike Pavone |
Fix infinite loop bug in sprite rendering
|
Mon, 31 Dec 2012 18:22:25 -0800 |
Mike Pavone |
Fix DMA fills to VRAM
|
Mon, 31 Dec 2012 18:12:08 -0800 |
Mike Pavone |
Fix DMA in progress flag in VDP status register
|
Mon, 31 Dec 2012 11:56:01 -0800 |
Mike Pavone |
Fix label names in disassembler
|
Mon, 31 Dec 2012 11:54:27 -0800 |
Mike Pavone |
Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
|
Mon, 31 Dec 2012 11:26:57 -0800 |
Mike Pavone |
Fix VDP reads
|
Sun, 30 Dec 2012 22:39:41 -0800 |
Mike Pavone |
Implemented HV counter
|
Sun, 30 Dec 2012 18:40:33 -0800 |
Mike Pavone |
Fix some bugs in decoding cmp
|
Sun, 30 Dec 2012 11:54:25 -0800 |
Mike Pavone |
Fix 68K->VDP DMA
|
Sun, 30 Dec 2012 09:55:18 -0800 |
Mike Pavone |
Improve disassembler
|
Sun, 30 Dec 2012 09:55:07 -0800 |
Mike Pavone |
Add support for pc indexed addressing mode to lea
|
Sun, 30 Dec 2012 07:52:44 -0800 |
Mike Pavone |
Support more address modes for jmp
|
Sun, 30 Dec 2012 01:15:16 -0800 |
Mike Pavone |
Fix bug that was causing DMA fills to lock up under certain circumstances
|
Sun, 30 Dec 2012 00:11:03 -0800 |
Mike Pavone |
Make version register return correct value for USA
|
Sat, 29 Dec 2012 23:40:30 -0800 |
Mike Pavone |
Fix swap
|
Sat, 29 Dec 2012 23:08:14 -0800 |
Mike Pavone |
Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed
|
Sat, 29 Dec 2012 23:07:23 -0800 |
Mike Pavone |
Fix crash when printing error message about modified return address
|
Sat, 29 Dec 2012 22:22:53 -0800 |
Mike Pavone |
Fix check in translate_m68k_src that deals with instructions for which both operands are registers that are not mapped to a native x86-64 register
|
Sat, 29 Dec 2012 22:11:28 -0800 |
Mike Pavone |
Fix encoding of movsx instruction when used with new (i.e. r9-r15) registers. This fixes the indexed addressing modes when used with a word-wide index register
|
Sat, 29 Dec 2012 21:55:42 -0800 |
Mike Pavone |
Some fixes for translating code in located in RAM
|
Sat, 29 Dec 2012 21:10:07 -0800 |
Mike Pavone |
Implement the rest of the bit instructions
|
Sat, 29 Dec 2012 20:33:39 -0800 |
Mike Pavone |
Implemented ROL and ROR
|
Sat, 29 Dec 2012 12:52:19 -0800 |
Mike Pavone |
Fix logic for switching between USP and SSP
|
Fri, 28 Dec 2012 22:47:22 -0800 |
Mike Pavone |
Fix decoding of CMPA
|
Fri, 28 Dec 2012 22:47:10 -0800 |
Mike Pavone |
Fix return address pushed to stack for jsr
|
Fri, 28 Dec 2012 21:36:22 -0800 |
Mike Pavone |
cycles should return dst
|
Fri, 28 Dec 2012 21:25:00 -0800 |
Mike Pavone |
Fix call_r in gen_x86 so that it properly returns a pointer to the location after the generated instruction
|
Fri, 28 Dec 2012 21:20:14 -0800 |
Mike Pavone |
Implement pea (untested).
|
Fri, 28 Dec 2012 20:46:29 -0800 |
Mike Pavone |
Fix Z80 busreq logic
|
Fri, 28 Dec 2012 19:21:05 -0800 |
Mike Pavone |
Allow jmp/jsr to follow pc-relative addresses in disassembler
|
Fri, 28 Dec 2012 17:59:41 -0800 |
Mike Pavone |
Defer the correct address for pc relative jsr/jmp
|
Fri, 28 Dec 2012 17:57:43 -0800 |
Mike Pavone |
Implement scc (untested)
|
Fri, 28 Dec 2012 15:34:24 -0800 |
Mike Pavone |
Fix decoding of Scc
|
Fri, 28 Dec 2012 15:16:36 -0800 |
Mike Pavone |
Implement more address modes for jsr
|
Fri, 28 Dec 2012 15:04:22 -0800 |
Mike Pavone |
COmment out fifo full debug printf
|
Fri, 28 Dec 2012 15:03:00 -0800 |
Mike Pavone |
Fix horizontal mask values for scroll plane map address calculation
|
Fri, 28 Dec 2012 14:30:25 -0800 |
Mike Pavone |
Fix areg indexed mode for move dst
|
Fri, 28 Dec 2012 11:07:13 -0800 |
Mike Pavone |
Implement ORI to CCR/SR
|
Fri, 28 Dec 2012 10:37:09 -0800 |
Mike Pavone |
Implemented move from SR
|
Thu, 27 Dec 2012 23:00:11 -0800 |
Mike Pavone |
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
|
Thu, 27 Dec 2012 22:48:54 -0800 |
Mike Pavone |
Don't pre-emptively translate code at interrupt vectors as some PD ROMs have these pointing at junk. Need some kind of heuristic for detecting garbage if I'm going to translate them ahead of time by default.
|
Thu, 27 Dec 2012 22:41:28 -0800 |
Mike Pavone |
allocate a new native code chunk when we run out of space
|
Thu, 27 Dec 2012 22:35:26 -0800 |
Mike Pavone |
Some fixes to add/addx sub/subx decoding
|
Thu, 27 Dec 2012 22:11:26 -0800 |
Mike Pavone |
Implement areg indexed mode for lea
|
Thu, 27 Dec 2012 22:05:22 -0800 |
Mike Pavone |
Allow use of indexed modes as move dst
|
Thu, 27 Dec 2012 21:54:54 -0800 |
Mike Pavone |
Allow indexed modes to be used as a destination
|
Thu, 27 Dec 2012 21:32:00 -0800 |
Mike Pavone |
Fix address register indexed addressing (probably)
|
Thu, 27 Dec 2012 21:23:55 -0800 |
Mike Pavone |
Fix pc indexed addressing (probably) when used as a source
|
Thu, 27 Dec 2012 21:19:58 -0800 |
Mike Pavone |
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
|
Thu, 27 Dec 2012 18:47:33 -0800 |
Mike Pavone |
Fix decoding bug for addq/subq
|
Thu, 27 Dec 2012 18:21:10 -0800 |
Mike Pavone |
Implement EXT, add some fixes to LINK/UNLK
|
Thu, 27 Dec 2012 10:40:03 -0800 |
Mike Pavone |
Fix some bugs in emulation of CLR
|
Thu, 27 Dec 2012 10:10:23 -0800 |
Mike Pavone |
Fix decoding bug in addq/subq
|
Wed, 26 Dec 2012 22:13:31 -0800 |
Mike Pavone |
Fix decoding of and
|
Wed, 26 Dec 2012 22:07:44 -0800 |
Mike Pavone |
Minor joypad fix and commeount out some debug printfs
|
Wed, 26 Dec 2012 21:50:48 -0800 |
Mike Pavone |
Forgot to add blastem main file earlier
|
Wed, 26 Dec 2012 20:18:58 -0800 |
Mike Pavone |
vertical interrupts now work
|
Wed, 26 Dec 2012 18:20:23 -0800 |
Mike Pavone |
RTE doesn't crash the emulator anymore
|
Wed, 26 Dec 2012 17:50:24 -0800 |
Mike Pavone |
Fix Z80 BUSREQ/RESET implementation.
|
Wed, 26 Dec 2012 17:34:59 -0800 |
Mike Pavone |
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
|
Wed, 26 Dec 2012 17:06:34 -0800 |
Mike Pavone |
Implement Z80 reset and bus request registers.
|
Wed, 26 Dec 2012 11:09:04 -0800 |
Mike Pavone |
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
|
Sat, 22 Dec 2012 21:37:25 -0800 |
Mike Pavone |
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
|
Fri, 21 Dec 2012 22:33:24 -0800 |
Mike Pavone |
Fix bug in disassembler that caused it to disassemble addresses it shouldn't
|
Fri, 21 Dec 2012 22:24:45 -0800 |
Mike Pavone |
Implement indexed with 8-bit displacement addressing modes in decoder and disassembler
|
Fri, 21 Dec 2012 21:53:05 -0800 |
Mike Pavone |
Added untested support for LINK and UNLK
|
Fri, 21 Dec 2012 21:26:16 -0800 |
Mike Pavone |
Removed some old debug printfs
|
Fri, 21 Dec 2012 21:19:03 -0800 |
Mike Pavone |
Implement JSR for some addressing modes
|
Fri, 21 Dec 2012 20:56:32 -0800 |
Mike Pavone |
Implement DMA (untested)
|
Fri, 21 Dec 2012 16:38:40 -0800 |
Mike Pavone |
Fix some bugs in movem with a register list destination
|
Fri, 21 Dec 2012 16:04:41 -0800 |
Mike Pavone |
Implement a couple of supervisor instructions
|
Fri, 21 Dec 2012 16:04:30 -0800 |
Mike Pavone |
Implement word wide access to IO area
|
Fri, 21 Dec 2012 01:00:52 -0800 |
Mike Pavone |
Implement more instructions and address modes
|
Thu, 20 Dec 2012 09:17:31 -0800 |
Mike Pavone |
Make the translator bail out if it hits an instruction I haven't implemented yet
|
Thu, 20 Dec 2012 09:12:24 -0800 |
Mike Pavone |
Fix disassembly of reg list in MOVEM when the reg list is the destination
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Thu, 20 Dec 2012 09:08:13 -0800 |
Mike Pavone |
Fix decoding and disassembly of MOVEM
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Thu, 20 Dec 2012 00:56:33 -0800 |
Mike Pavone |
Fix BTST
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Thu, 20 Dec 2012 00:44:59 -0800 |
Mike Pavone |
Gamepad support
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Wed, 19 Dec 2012 22:15:16 -0800 |
Mike Pavone |
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
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Wed, 19 Dec 2012 21:25:39 -0800 |
Mike Pavone |
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
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Wed, 19 Dec 2012 20:53:59 -0800 |
Mike Pavone |
Add FPS counter to console output
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Wed, 19 Dec 2012 20:53:45 -0800 |
Mike Pavone |
Print out large immediate values in hex rather than decimal form
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Wed, 19 Dec 2012 20:23:59 -0800 |
Mike Pavone |
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
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Tue, 18 Dec 2012 23:55:10 -0800 |
Mike Pavone |
Fix operand order for AND instructions
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Tue, 18 Dec 2012 22:56:04 -0800 |
Mike Pavone |
ecx was getting clobbered before the relevant temp value was used in some cases during memory reads
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Tue, 18 Dec 2012 22:20:25 -0800 |
Mike Pavone |
Properly zero-init all VDP buffers. Comment out some debug printfs.
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Tue, 18 Dec 2012 22:19:52 -0800 |
Mike Pavone |
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
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Tue, 18 Dec 2012 19:51:33 -0800 |
Mike Pavone |
Fix CRAM and possibly VSRAM writes
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Tue, 18 Dec 2012 19:51:17 -0800 |
Mike Pavone |
Add palette debug to SDL renderer
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Tue, 18 Dec 2012 02:16:42 -0800 |
Mike Pavone |
Get Flavio's color bar demo kind of sort of working
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Sun, 16 Dec 2012 22:25:29 -0800 |
Mike Pavone |
Add preliminary support for JMP
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Sun, 16 Dec 2012 21:57:52 -0800 |
Mike Pavone |
Implement CLR, minor refactor of register offset calculation in context struct
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Sat, 15 Dec 2012 23:01:32 -0800 |
Mike Pavone |
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
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Thu, 13 Dec 2012 09:47:40 -0800 |
Mike Pavone |
Fix shift rotate instruction decoding and improve disassembly of move USP and conditional branch instructions
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Wed, 12 Dec 2012 23:21:11 -0800 |
Mike Pavone |
Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
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Wed, 12 Dec 2012 21:25:31 -0800 |
Mike Pavone |
Don't try to disassemble addresses beyond the end of the cartridge
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Wed, 12 Dec 2012 20:43:42 -0800 |
Mike Pavone |
Fix bug in address visitation in disassembler
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Wed, 12 Dec 2012 20:18:06 -0800 |
Mike Pavone |
Add support for dbcc instruction
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Wed, 12 Dec 2012 20:17:59 -0800 |
Mike Pavone |
Add vector table to test.s68
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Wed, 12 Dec 2012 20:17:11 -0800 |
Mike Pavone |
Add logic for following control flow based on logic in the translator
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Sun, 09 Dec 2012 18:40:45 -0800 |
Mike Pavone |
Add debug render mode and fix vertical flip bit for bg tiles
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Sun, 09 Dec 2012 17:26:36 -0800 |
Mike Pavone |
Fix bug in tile address masking. Remove some debug code from window plane.
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Sun, 09 Dec 2012 17:10:08 -0800 |
Mike Pavone |
More correct window support, maybe
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Sun, 09 Dec 2012 17:05:13 -0800 |
Mike Pavone |
Broken window support
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Sun, 09 Dec 2012 01:13:41 -0800 |
Mike Pavone |
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
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Sun, 09 Dec 2012 00:03:15 -0800 |
Mike Pavone |
Implement sprite index >= sprite limit triggers sprite limit behavior
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Sat, 08 Dec 2012 23:49:51 -0800 |
Mike Pavone |
Initial H32 mode support
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Sat, 08 Dec 2012 23:09:40 -0800 |
Mike Pavone |
Pass all sprite masking tests
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Sat, 08 Dec 2012 23:06:13 -0800 |
Mike Pavone |
Small fix to overflow flag
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Sat, 08 Dec 2012 22:50:14 -0800 |
Mike Pavone |
Improve sprite masking to almost completely pass Nemesis' sprite masking test
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