| Sun, 30 Dec 2012 01:15:16 -0800 |
Mike Pavone |
Fix bug that was causing DMA fills to lock up under certain circumstances
|
| Sun, 30 Dec 2012 00:11:03 -0800 |
Mike Pavone |
Make version register return correct value for USA
|
| Sat, 29 Dec 2012 23:40:30 -0800 |
Mike Pavone |
Fix swap
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| Sat, 29 Dec 2012 23:08:14 -0800 |
Mike Pavone |
Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed
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| Sat, 29 Dec 2012 23:07:23 -0800 |
Mike Pavone |
Fix crash when printing error message about modified return address
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| Sat, 29 Dec 2012 22:22:53 -0800 |
Mike Pavone |
Fix check in translate_m68k_src that deals with instructions for which both operands are registers that are not mapped to a native x86-64 register
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| Sat, 29 Dec 2012 22:11:28 -0800 |
Mike Pavone |
Fix encoding of movsx instruction when used with new (i.e. r9-r15) registers. This fixes the indexed addressing modes when used with a word-wide index register
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| Sat, 29 Dec 2012 21:55:42 -0800 |
Mike Pavone |
Some fixes for translating code in located in RAM
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| Sat, 29 Dec 2012 21:10:07 -0800 |
Mike Pavone |
Implement the rest of the bit instructions
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| Sat, 29 Dec 2012 20:33:39 -0800 |
Mike Pavone |
Implemented ROL and ROR
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| Sat, 29 Dec 2012 12:52:19 -0800 |
Mike Pavone |
Fix logic for switching between USP and SSP
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| Fri, 28 Dec 2012 22:47:22 -0800 |
Mike Pavone |
Fix decoding of CMPA
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| Fri, 28 Dec 2012 22:47:10 -0800 |
Mike Pavone |
Fix return address pushed to stack for jsr
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| Fri, 28 Dec 2012 21:36:22 -0800 |
Mike Pavone |
cycles should return dst
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| Fri, 28 Dec 2012 21:25:00 -0800 |
Mike Pavone |
Fix call_r in gen_x86 so that it properly returns a pointer to the location after the generated instruction
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| Fri, 28 Dec 2012 21:20:14 -0800 |
Mike Pavone |
Implement pea (untested).
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| Fri, 28 Dec 2012 20:46:29 -0800 |
Mike Pavone |
Fix Z80 busreq logic
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| Fri, 28 Dec 2012 19:21:05 -0800 |
Mike Pavone |
Allow jmp/jsr to follow pc-relative addresses in disassembler
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| Fri, 28 Dec 2012 17:59:41 -0800 |
Mike Pavone |
Defer the correct address for pc relative jsr/jmp
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| Fri, 28 Dec 2012 17:57:43 -0800 |
Mike Pavone |
Implement scc (untested)
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| Fri, 28 Dec 2012 15:34:24 -0800 |
Mike Pavone |
Fix decoding of Scc
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| Fri, 28 Dec 2012 15:16:36 -0800 |
Mike Pavone |
Implement more address modes for jsr
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| Fri, 28 Dec 2012 15:04:22 -0800 |
Mike Pavone |
COmment out fifo full debug printf
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| Fri, 28 Dec 2012 15:03:00 -0800 |
Mike Pavone |
Fix horizontal mask values for scroll plane map address calculation
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| Fri, 28 Dec 2012 14:30:25 -0800 |
Mike Pavone |
Fix areg indexed mode for move dst
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| Fri, 28 Dec 2012 11:07:13 -0800 |
Mike Pavone |
Implement ORI to CCR/SR
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| Fri, 28 Dec 2012 10:37:09 -0800 |
Mike Pavone |
Implemented move from SR
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| Thu, 27 Dec 2012 23:00:11 -0800 |
Mike Pavone |
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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| Thu, 27 Dec 2012 22:48:54 -0800 |
Mike Pavone |
Don't pre-emptively translate code at interrupt vectors as some PD ROMs have these pointing at junk. Need some kind of heuristic for detecting garbage if I'm going to translate them ahead of time by default.
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| Thu, 27 Dec 2012 22:41:28 -0800 |
Mike Pavone |
allocate a new native code chunk when we run out of space
|
| Thu, 27 Dec 2012 22:35:26 -0800 |
Mike Pavone |
Some fixes to add/addx sub/subx decoding
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| Thu, 27 Dec 2012 22:11:26 -0800 |
Mike Pavone |
Implement areg indexed mode for lea
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| Thu, 27 Dec 2012 22:05:22 -0800 |
Mike Pavone |
Allow use of indexed modes as move dst
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| Thu, 27 Dec 2012 21:54:54 -0800 |
Mike Pavone |
Allow indexed modes to be used as a destination
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| Thu, 27 Dec 2012 21:32:00 -0800 |
Mike Pavone |
Fix address register indexed addressing (probably)
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| Thu, 27 Dec 2012 21:23:55 -0800 |
Mike Pavone |
Fix pc indexed addressing (probably) when used as a source
|
| Thu, 27 Dec 2012 21:19:58 -0800 |
Mike Pavone |
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
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| Thu, 27 Dec 2012 18:47:33 -0800 |
Mike Pavone |
Fix decoding bug for addq/subq
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| Thu, 27 Dec 2012 18:21:10 -0800 |
Mike Pavone |
Implement EXT, add some fixes to LINK/UNLK
|
| Thu, 27 Dec 2012 10:40:03 -0800 |
Mike Pavone |
Fix some bugs in emulation of CLR
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| Thu, 27 Dec 2012 10:10:23 -0800 |
Mike Pavone |
Fix decoding bug in addq/subq
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| Wed, 26 Dec 2012 22:13:31 -0800 |
Mike Pavone |
Fix decoding of and
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| Wed, 26 Dec 2012 22:07:44 -0800 |
Mike Pavone |
Minor joypad fix and commeount out some debug printfs
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| Wed, 26 Dec 2012 21:50:48 -0800 |
Mike Pavone |
Forgot to add blastem main file earlier
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| Wed, 26 Dec 2012 20:18:58 -0800 |
Mike Pavone |
vertical interrupts now work
|
| Wed, 26 Dec 2012 18:20:23 -0800 |
Mike Pavone |
RTE doesn't crash the emulator anymore
|
| Wed, 26 Dec 2012 17:50:24 -0800 |
Mike Pavone |
Fix Z80 BUSREQ/RESET implementation.
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| Wed, 26 Dec 2012 17:34:59 -0800 |
Mike Pavone |
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
|
| Wed, 26 Dec 2012 17:06:34 -0800 |
Mike Pavone |
Implement Z80 reset and bus request registers.
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| Wed, 26 Dec 2012 11:09:04 -0800 |
Mike Pavone |
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
|
| Sat, 22 Dec 2012 21:37:25 -0800 |
Mike Pavone |
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
|
| Fri, 21 Dec 2012 22:33:24 -0800 |
Mike Pavone |
Fix bug in disassembler that caused it to disassemble addresses it shouldn't
|
| Fri, 21 Dec 2012 22:24:45 -0800 |
Mike Pavone |
Implement indexed with 8-bit displacement addressing modes in decoder and disassembler
|
| Fri, 21 Dec 2012 21:53:05 -0800 |
Mike Pavone |
Added untested support for LINK and UNLK
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| Fri, 21 Dec 2012 21:26:16 -0800 |
Mike Pavone |
Removed some old debug printfs
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| Fri, 21 Dec 2012 21:19:03 -0800 |
Mike Pavone |
Implement JSR for some addressing modes
|
| Fri, 21 Dec 2012 20:56:32 -0800 |
Mike Pavone |
Implement DMA (untested)
|
| Fri, 21 Dec 2012 16:38:40 -0800 |
Mike Pavone |
Fix some bugs in movem with a register list destination
|
| Fri, 21 Dec 2012 16:04:41 -0800 |
Mike Pavone |
Implement a couple of supervisor instructions
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| Fri, 21 Dec 2012 16:04:30 -0800 |
Mike Pavone |
Implement word wide access to IO area
|
| Fri, 21 Dec 2012 01:00:52 -0800 |
Mike Pavone |
Implement more instructions and address modes
|
| Thu, 20 Dec 2012 09:17:31 -0800 |
Mike Pavone |
Make the translator bail out if it hits an instruction I haven't implemented yet
|
| Thu, 20 Dec 2012 09:12:24 -0800 |
Mike Pavone |
Fix disassembly of reg list in MOVEM when the reg list is the destination
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| Thu, 20 Dec 2012 09:08:13 -0800 |
Mike Pavone |
Fix decoding and disassembly of MOVEM
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| Thu, 20 Dec 2012 00:56:33 -0800 |
Mike Pavone |
Fix BTST
|
| Thu, 20 Dec 2012 00:44:59 -0800 |
Mike Pavone |
Gamepad support
|
| Wed, 19 Dec 2012 22:15:16 -0800 |
Mike Pavone |
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
|
| Wed, 19 Dec 2012 21:25:39 -0800 |
Mike Pavone |
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
|
| Wed, 19 Dec 2012 20:53:59 -0800 |
Mike Pavone |
Add FPS counter to console output
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| Wed, 19 Dec 2012 20:53:45 -0800 |
Mike Pavone |
Print out large immediate values in hex rather than decimal form
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| Wed, 19 Dec 2012 20:23:59 -0800 |
Mike Pavone |
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
|
| Tue, 18 Dec 2012 23:55:10 -0800 |
Mike Pavone |
Fix operand order for AND instructions
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| Tue, 18 Dec 2012 22:56:04 -0800 |
Mike Pavone |
ecx was getting clobbered before the relevant temp value was used in some cases during memory reads
|
| Tue, 18 Dec 2012 22:20:25 -0800 |
Mike Pavone |
Properly zero-init all VDP buffers. Comment out some debug printfs.
|
| Tue, 18 Dec 2012 22:19:52 -0800 |
Mike Pavone |
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
|
| Tue, 18 Dec 2012 19:51:33 -0800 |
Mike Pavone |
Fix CRAM and possibly VSRAM writes
|
| Tue, 18 Dec 2012 19:51:17 -0800 |
Mike Pavone |
Add palette debug to SDL renderer
|
| Tue, 18 Dec 2012 02:16:42 -0800 |
Mike Pavone |
Get Flavio's color bar demo kind of sort of working
|
| Sun, 16 Dec 2012 22:25:29 -0800 |
Mike Pavone |
Add preliminary support for JMP
|
| Sun, 16 Dec 2012 21:57:52 -0800 |
Mike Pavone |
Implement CLR, minor refactor of register offset calculation in context struct
|
| Sat, 15 Dec 2012 23:01:32 -0800 |
Mike Pavone |
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
|
| Thu, 13 Dec 2012 09:47:40 -0800 |
Mike Pavone |
Fix shift rotate instruction decoding and improve disassembly of move USP and conditional branch instructions
|
| Wed, 12 Dec 2012 23:21:11 -0800 |
Mike Pavone |
Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
|
| Wed, 12 Dec 2012 21:25:31 -0800 |
Mike Pavone |
Don't try to disassemble addresses beyond the end of the cartridge
|
| Wed, 12 Dec 2012 20:43:42 -0800 |
Mike Pavone |
Fix bug in address visitation in disassembler
|
| Wed, 12 Dec 2012 20:18:06 -0800 |
Mike Pavone |
Add support for dbcc instruction
|
| Wed, 12 Dec 2012 20:17:59 -0800 |
Mike Pavone |
Add vector table to test.s68
|
| Wed, 12 Dec 2012 20:17:11 -0800 |
Mike Pavone |
Add logic for following control flow based on logic in the translator
|
| Sun, 09 Dec 2012 18:40:45 -0800 |
Mike Pavone |
Add debug render mode and fix vertical flip bit for bg tiles
|
| Sun, 09 Dec 2012 17:26:36 -0800 |
Mike Pavone |
Fix bug in tile address masking. Remove some debug code from window plane.
|
| Sun, 09 Dec 2012 17:10:08 -0800 |
Mike Pavone |
More correct window support, maybe
|
| Sun, 09 Dec 2012 17:05:13 -0800 |
Mike Pavone |
Broken window support
|
| Sun, 09 Dec 2012 01:13:41 -0800 |
Mike Pavone |
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
|
| Sun, 09 Dec 2012 00:03:15 -0800 |
Mike Pavone |
Implement sprite index >= sprite limit triggers sprite limit behavior
|
| Sat, 08 Dec 2012 23:49:51 -0800 |
Mike Pavone |
Initial H32 mode support
|
| Sat, 08 Dec 2012 23:09:40 -0800 |
Mike Pavone |
Pass all sprite masking tests
|
| Sat, 08 Dec 2012 23:06:13 -0800 |
Mike Pavone |
Small fix to overflow flag
|
| Sat, 08 Dec 2012 22:50:14 -0800 |
Mike Pavone |
Improve sprite masking to almost completely pass Nemesis' sprite masking test
|
| Sat, 08 Dec 2012 22:07:25 -0800 |
Mike Pavone |
Add support for simple resolution scaling
|
| Sat, 08 Dec 2012 21:39:01 -0800 |
Mike Pavone |
Fix horizontal sprite mirroring
|
| Sat, 08 Dec 2012 20:25:56 -0800 |
Mike Pavone |
Make horizontal scrolling closer to correct, Comix Zone looks good, Sonic 2 slightly off
|
| Sat, 08 Dec 2012 20:02:10 -0800 |
Mike Pavone |
Small cleanup
|
| Sat, 08 Dec 2012 19:59:32 -0800 |
Mike Pavone |
Fix horizontal scroll offset
|
| Sat, 08 Dec 2012 19:42:07 -0800 |
Mike Pavone |
Fix BG plane B render bug
|
| Sat, 08 Dec 2012 16:58:11 -0800 |
Mike Pavone |
Fix sprite transparency for overlapping sprites
|
| Sat, 08 Dec 2012 16:46:47 -0800 |
Mike Pavone |
Fix management of context->sprite_draws so the sprite layer only draws when it should
|
| Sat, 08 Dec 2012 16:16:18 -0800 |
Mike Pavone |
Fix vertical scroll value for plane B
|
| Sat, 08 Dec 2012 16:09:43 -0800 |
Mike Pavone |
Partially fix BG plane B
|
| Sat, 08 Dec 2012 16:02:17 -0800 |
Mike Pavone |
Fix endianness of VSRAM when read from Genecyst save state
|
| Sat, 08 Dec 2012 11:59:50 -0800 |
Mike Pavone |
Sprites fixed, working on bg planes
|
| Sat, 08 Dec 2012 11:12:17 -0800 |
Mike Pavone |
Sprites somewhat less broken
|
| Sat, 08 Dec 2012 02:00:54 -0800 |
Mike Pavone |
Mostly broken VDP core and savestate viewer
|
| Tue, 04 Dec 2012 19:25:54 -0800 |
Mike Pavone |
Initial support for M68k reset vector, rather than starting at an arbitrary address
|
| Tue, 04 Dec 2012 19:13:12 -0800 |
Mike Pavone |
M68K to x86 translation works for a limited subset of instructions and addressing modes
|
| Tue, 27 Nov 2012 22:54:38 -0800 |
Mike Pavone |
Add asssembly runtime code stub
|
| Tue, 27 Nov 2012 22:50:09 -0800 |
Mike Pavone |
Add Makefile
|
| Tue, 27 Nov 2012 22:43:32 -0800 |
Mike Pavone |
Make x86 generator generic with respect to operand size for immediate parameters.
|
| Tue, 27 Nov 2012 09:28:13 -0800 |
Mike Pavone |
x86 code gen, initial work on translator
|
| Thu, 15 Nov 2012 22:15:43 -0800 |
Mike Pavone |
Improve disassembly. FIx some decoding bugs.
|
| Thu, 15 Nov 2012 00:52:53 -0800 |
Mike Pavone |
Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
|
