| Mon, 28 Jan 2019 22:49:02 -0800 |
Michael Pavone |
Implementation of carry/overflow flags for adc instructions in CPU DSL
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| Mon, 28 Jan 2019 22:37:46 -0800 |
Michael Pavone |
Fixed flag calculation for sub instructions in CPU DSL
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| Mon, 28 Jan 2019 21:30:23 -0800 |
Michael Pavone |
Less broken flag calulcation for sub instructions in CPU DSL
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| Mon, 28 Jan 2019 21:16:41 -0800 |
Michael Pavone |
Initial checkin of new WIP Z80 core using CPU DSL
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| Mon, 28 Jan 2019 21:15:27 -0800 |
Michael Pavone |
Initial stab at overflow flag implementation in CPU DSL. Probably broken for subtraction
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| Mon, 28 Jan 2019 20:54:55 -0800 |
Michael Pavone |
First stab at carry and half-carry calculation in CPU DSL
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| Mon, 28 Jan 2019 19:24:04 -0800 |
Michael Pavone |
Fix zero flag calculation in CPU DSL
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| Sun, 27 Jan 2019 14:37:37 -0800 |
Michael Pavone |
Implemented sbc instruction in CPU DSL
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| Sun, 27 Jan 2019 05:55:08 -0800 |
Michael Pavone |
Added adc instruction to CPU DSL
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| Fri, 25 Jan 2019 14:30:55 -0800 |
Michael Pavone |
Output tables in order specified by the extra_tables field so the user can deal with dependencies between tables
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| Fri, 25 Jan 2019 14:13:46 -0800 |
Michael Pavone |
Fix constant propagation to a non-ephemeral destination in CPU DSL
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| Fri, 25 Jan 2019 13:55:30 -0800 |
Michael Pavone |
Fixed missing semicolon in coalesceFlags
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| Fri, 25 Jan 2019 13:45:58 -0800 |
Michael Pavone |
Added new sext instruction for sign extension to CPU sdl
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| Thu, 24 Jan 2019 19:15:59 -0800 |
Michael Pavone |
Merge from default
mame_interp
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| Thu, 24 Jan 2019 19:14:16 -0800 |
Michael Pavone |
Properly support interlace in libretro build
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