| Thu, 19 Jan 2017 09:32:34 -0800 |
Michael Pavone |
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
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| Wed, 18 Jan 2017 23:43:36 -0800 |
Michael Pavone |
Overscan is now configurable
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| Wed, 18 Jan 2017 21:30:20 -0800 |
Michael Pavone |
CRAM contention artifact emulation
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| Wed, 18 Jan 2017 07:29:06 -0800 |
Michael Pavone |
Fix regression in tracking of 3+ byte instructions in Z80 core
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| Tue, 17 Jan 2017 19:01:13 -0800 |
Michael Pavone |
Update gst loader to deal with VDP changes
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| Tue, 17 Jan 2017 19:01:04 -0800 |
Michael Pavone |
Undo poorly thought out minor optimization that screwed up rendering
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| Tue, 17 Jan 2017 09:27:05 -0800 |
Michael Pavone |
Fix vdp_run_to_vblank
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| Tue, 17 Jan 2017 09:18:35 -0800 |
Michael Pavone |
Disable timing debug
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| Tue, 17 Jan 2017 09:18:16 -0800 |
Michael Pavone |
Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
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| Tue, 17 Jan 2017 09:17:43 -0800 |
Michael Pavone |
Add some dummy functions to test_int_timing so debug builds of it succeed
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| Tue, 17 Jan 2017 09:02:36 -0800 |
Michael Pavone |
Fix H40 VInt inconsistency
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| Mon, 16 Jan 2017 23:34:30 -0800 |
Michael Pavone |
Fix H32 VInt timing inconsistency
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| Mon, 16 Jan 2017 22:30:21 -0800 |
Michael Pavone |
Fix H32 inconsistency
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| Mon, 16 Jan 2017 21:38:49 -0800 |
Michael Pavone |
Added synthetic test for tracking down interrupt timing issues
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| Mon, 16 Jan 2017 09:31:33 -0800 |
Michael Pavone |
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
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