| Sat, 24 Feb 2024 11:53:44 -0800 |
Michael Pavone |
Add missing mask to vscroll calculation in Mode 4
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| Fri, 23 Feb 2024 23:09:20 -0800 |
Michael Pavone |
Implement neg and not instructions in new 68K core
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| Fri, 23 Feb 2024 23:09:07 -0800 |
Michael Pavone |
Fix carry flag calculation for neg instruction in CPU DSL
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| Fri, 23 Feb 2024 23:08:45 -0800 |
Michael Pavone |
Save SR before saving result in test generator. Move instructions update flags on 68K
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| Fri, 23 Feb 2024 20:22:00 -0800 |
Michael Pavone |
Fix handling of zero timer value
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| Fri, 23 Feb 2024 01:16:38 -0800 |
Michael Pavone |
Initial work on emulating the YMZ263B in the Copera
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| Wed, 21 Feb 2024 23:42:19 -0800 |
Michael Pavone |
Initial work on Copera emulation
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| Wed, 21 Feb 2024 20:34:52 -0800 |
Michael Pavone |
Avoid spawning secondary windows right on top of the main one
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| Wed, 21 Feb 2024 20:25:06 -0800 |
Michael Pavone |
Fix libretro build
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| Wed, 21 Feb 2024 20:09:11 -0800 |
Michael Pavone |
Implement movep in new 68K core
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| Mon, 19 Feb 2024 23:00:49 -0800 |
Michael Pavone |
Fix bit instruction penalty cycle check for cases when bit number is out of range
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| Mon, 19 Feb 2024 22:52:21 -0800 |
Michael Pavone |
Implement bit instructions in new CPU core
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| Mon, 19 Feb 2024 18:14:56 -0800 |
Michael Pavone |
Implement cmp instructions in new 68K core
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| Mon, 19 Feb 2024 18:14:12 -0800 |
Michael Pavone |
Allow more if statements to be constant folded in CPU DSL
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| Mon, 19 Feb 2024 17:55:45 -0800 |
Michael Pavone |
Fix implementation of cmp for 32-bit operands or when operation size is smaller than the size of the operands
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