| Tue, 14 May 2013 00:03:26 -0700 |
Mike Pavone |
Fixup VINT cycle and HBLANK flag for the previous timing fixes
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| Mon, 13 May 2013 23:42:52 -0700 |
Mike Pavone |
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
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| Mon, 13 May 2013 21:52:33 -0700 |
Mike Pavone |
Implement first line/last line weirdness in VDP
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| Mon, 13 May 2013 21:36:33 -0700 |
Mike Pavone |
Fewer magic numbers in the VDP core for the win
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| Mon, 13 May 2013 21:06:08 -0700 |
Mike Pavone |
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
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| Mon, 13 May 2013 21:05:49 -0700 |
Mike Pavone |
Added more 68K test cases
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| Sun, 12 May 2013 01:34:29 -0700 |
Mike Pavone |
Fixed decoding of CHK destination
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| Sun, 12 May 2013 01:34:17 -0700 |
Mike Pavone |
Fix retrun address calculation for CHK exceptions
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| Sat, 11 May 2013 23:59:20 -0700 |
Mike Pavone |
Properly mask sprite X and Y coordinates
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| Sat, 11 May 2013 22:45:05 -0700 |
Mike Pavone |
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
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| Sat, 11 May 2013 21:19:31 -0700 |
Mike Pavone |
Don't update interrupt mask on non-interrupt exceptions
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| Sat, 11 May 2013 01:57:41 -0700 |
Mike Pavone |
Fix check for code writes
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| Sat, 11 May 2013 01:38:57 -0700 |
Mike Pavone |
Port instruction retranslation improvements from Z80 core to M68K core
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| Fri, 10 May 2013 23:16:06 -0700 |
Mike Pavone |
Implement hblank flag in status register
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| Fri, 10 May 2013 22:57:56 -0700 |
Mike Pavone |
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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| Thu, 09 May 2013 20:59:49 -0700 |
Mike Pavone |
Add YM2612 stubs to transz80
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| Thu, 09 May 2013 20:09:49 -0700 |
Mike Pavone |
Fix return address for RST
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| Thu, 09 May 2013 19:38:28 -0700 |
Mike Pavone |
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
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| Thu, 09 May 2013 19:24:18 -0700 |
Mike Pavone |
Fix terminal instruction detection in disassembler
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| Thu, 09 May 2013 18:36:21 -0700 |
Mike Pavone |
Properly handle instructions that use boty IYH and IYL
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| Thu, 09 May 2013 00:33:06 -0700 |
Mike Pavone |
Set the N flag to the correct value for DEC instructions
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| Thu, 09 May 2013 00:30:55 -0700 |
Mike Pavone |
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
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| Thu, 09 May 2013 00:17:12 -0700 |
Mike Pavone |
Correctly set the N flag for SBC
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| Thu, 09 May 2013 00:14:54 -0700 |
Mike Pavone |
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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| Wed, 08 May 2013 23:44:49 -0700 |
Mike Pavone |
Complete flag behavior for Z80 BIT instruction
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| Wed, 08 May 2013 23:31:19 -0700 |
Mike Pavone |
Properly handle negative displacements in Z80 core
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| Wed, 08 May 2013 23:29:21 -0700 |
Mike Pavone |
Contrary to the official documenation, OR and AND also set PV based on parity instead of overflow
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| Wed, 08 May 2013 23:20:41 -0700 |
Mike Pavone |
Set PV flag based on parity, not overflow for XOR
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| Wed, 08 May 2013 23:17:54 -0700 |
Mike Pavone |
BIT was setting the zero flag to the opposite of what it should have. This is now fixed.
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| Wed, 08 May 2013 23:12:08 -0700 |
Mike Pavone |
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
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