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age author description
Tue, 27 Dec 2016 13:38:58 -0800 Michael Pavone The function of the HVC Latch enable bit in mode register 1 is different when not in mode 5
Tue, 27 Dec 2016 13:26:14 -0800 Michael Pavone Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4
Tue, 27 Dec 2016 13:11:07 -0800 Michael Pavone Implemented Mode 4 sprite list termination
Tue, 27 Dec 2016 12:43:37 -0800 Michael Pavone Less broken Mode 4 implementation
Tue, 27 Dec 2016 11:31:17 -0800 Michael Pavone Somewhat broken implementation of Mode 4
Thu, 22 Dec 2016 20:39:35 -0800 Michael Pavone Fix clearing of interrupt pending flags on control port read in PBC mode
Thu, 22 Dec 2016 19:54:11 -0800 Michael Pavone Added Jaguar header missed in earlier commits
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