| Fri, 21 Dec 2012 01:00:52 -0800 |
Mike Pavone |
Implement more instructions and address modes
|
| Thu, 20 Dec 2012 09:17:31 -0800 |
Mike Pavone |
Make the translator bail out if it hits an instruction I haven't implemented yet
|
| Thu, 20 Dec 2012 09:12:24 -0800 |
Mike Pavone |
Fix disassembly of reg list in MOVEM when the reg list is the destination
|
| Thu, 20 Dec 2012 09:08:13 -0800 |
Mike Pavone |
Fix decoding and disassembly of MOVEM
|
| Thu, 20 Dec 2012 00:56:33 -0800 |
Mike Pavone |
Fix BTST
|
| Thu, 20 Dec 2012 00:44:59 -0800 |
Mike Pavone |
Gamepad support
|
| Wed, 19 Dec 2012 22:15:16 -0800 |
Mike Pavone |
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
|
| Wed, 19 Dec 2012 21:25:39 -0800 |
Mike Pavone |
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
|
| Wed, 19 Dec 2012 20:53:59 -0800 |
Mike Pavone |
Add FPS counter to console output
|
| Wed, 19 Dec 2012 20:53:45 -0800 |
Mike Pavone |
Print out large immediate values in hex rather than decimal form
|
| Wed, 19 Dec 2012 20:23:59 -0800 |
Mike Pavone |
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
|
| Tue, 18 Dec 2012 23:55:10 -0800 |
Mike Pavone |
Fix operand order for AND instructions
|
| Tue, 18 Dec 2012 22:56:04 -0800 |
Mike Pavone |
ecx was getting clobbered before the relevant temp value was used in some cases during memory reads
|
| Tue, 18 Dec 2012 22:20:25 -0800 |
Mike Pavone |
Properly zero-init all VDP buffers. Comment out some debug printfs.
|
| Tue, 18 Dec 2012 22:19:52 -0800 |
Mike Pavone |
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
|
| Tue, 18 Dec 2012 19:51:33 -0800 |
Mike Pavone |
Fix CRAM and possibly VSRAM writes
|
| Tue, 18 Dec 2012 19:51:17 -0800 |
Mike Pavone |
Add palette debug to SDL renderer
|
| Tue, 18 Dec 2012 02:16:42 -0800 |
Mike Pavone |
Get Flavio's color bar demo kind of sort of working
|
| Sun, 16 Dec 2012 22:25:29 -0800 |
Mike Pavone |
Add preliminary support for JMP
|
| Sun, 16 Dec 2012 21:57:52 -0800 |
Mike Pavone |
Implement CLR, minor refactor of register offset calculation in context struct
|
| Sat, 15 Dec 2012 23:01:32 -0800 |
Mike Pavone |
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
|
| Thu, 13 Dec 2012 09:47:40 -0800 |
Mike Pavone |
Fix shift rotate instruction decoding and improve disassembly of move USP and conditional branch instructions
|
| Wed, 12 Dec 2012 23:21:11 -0800 |
Mike Pavone |
Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
|
| Wed, 12 Dec 2012 21:25:31 -0800 |
Mike Pavone |
Don't try to disassemble addresses beyond the end of the cartridge
|
| Wed, 12 Dec 2012 20:43:42 -0800 |
Mike Pavone |
Fix bug in address visitation in disassembler
|
| Wed, 12 Dec 2012 20:18:06 -0800 |
Mike Pavone |
Add support for dbcc instruction
|
| Wed, 12 Dec 2012 20:17:59 -0800 |
Mike Pavone |
Add vector table to test.s68
|
| Wed, 12 Dec 2012 20:17:11 -0800 |
Mike Pavone |
Add logic for following control flow based on logic in the translator
|
| Sun, 09 Dec 2012 18:40:45 -0800 |
Mike Pavone |
Add debug render mode and fix vertical flip bit for bg tiles
|
| Sun, 09 Dec 2012 17:26:36 -0800 |
Mike Pavone |
Fix bug in tile address masking. Remove some debug code from window plane.
|
