annotate modules/il.tp @ 189:a45e535f7742

Determine live ranges for logical registers as part of initial work on register allocator
author Mike Pavone <pavone@retrodev.com>
date Mon, 26 Aug 2013 18:23:05 -0700
parents 181d8754a2ae
children 4293c725394c
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1 {
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2 //commutative ops
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3 _add <- 0
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4 _and <- 1
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5 _or <- 2
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6 _xor <- 3
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7 //non-commutative ops
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8 _sub <- 4
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9 _cmp <- 5
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10 _not <- 6
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11 _sl <- 7
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12 _asr <- 8
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13 _lsr <- 9
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14 _rol <- 10
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15 _ror <- 11
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16 _mov <- 12
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17 _call <- 13
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18 _ret <- 14
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19 _skipif <- 15
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20
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21 _names <- #[
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22 "add"
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23 "and"
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24 "or"
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25 "xor"
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26 "sub"
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27 "cmp"
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28 "not"
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29 "sl"
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30 "asr"
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31 "lsr"
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32 "rol"
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33 "ror"
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34 "mov"
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35 "call"
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36 "ret"
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37 "skipIf"
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38 ]
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39
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40 op3:a:b:out:size <- :_opcode :_ina :_inb :_out :_size {
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41 #{
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42 opcode <- { _opcode }
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43 ina <- { _ina }
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44 inb <- { _inb }
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45 commutative? <- { _opcode < _sub }
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46 out <- { _out }
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47 size <- { _size }
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48 numops <- { 3 }
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49 name <- { _names get: _opcode }
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50 string <- { name . " " . (string: _ina) . " " . (string: _inb) . " " . (string: _out) . " " . (string: _size) }
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51 recordUsage:at <- :tracker :address {
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52 if: (not: (_ina isInteger?)) {
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53 _ina recordUsage: tracker at: 0 | address withSize: _size
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54 }
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55 _inb recordUsage: tracker at: 0 | address withSize: _size
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56 _out recordUsage: tracker at: 1 | address withSize: _size
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57 }
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58 }
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59 }
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60 op2:in:out:size <- :_opcode :_in :_out :_size {
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61 #{
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62 opcode <- { _opcode }
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63 in <- { _in }
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64 out <- { _out }
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65 size <- { _size }
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66 numops <- { 2 }
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67 name <- { _names get: _opcode }
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68 string <- { name . " " . (string: _in) . " " . (string: _out) . " " . (string: _size) }
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69 recordUsage:at <- :tracker :address {
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70 if: (not: (_in isInteger?)) {
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71 _in recordUsage: tracker at: 0 | address withSize: _size
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72 }
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73 _out recordUsage: tracker at: 1 | address withSize: _size
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74 }
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75 }
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76 }
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77 op1:arg:size <- :_opcode :_arg :_size {
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78 #{
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79 opcode <- { _opcode }
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80 arg <- { _arg }
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81 size <- { _size }
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82 numops <- { 1 }
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83 name <- { _names get: _opcode }
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84 string <- { name . " " . (string: _arg) . " " . (string: _size) }
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85 recordUsage:at <- :tracker :address {
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86 if: (not: (_arg isInteger?)) {
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87 _arg recordUsage: tracker at: address withSize: _size
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88 }
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89 }
185
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90 }
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91 }
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92
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93 _sizenames <- #["b" "w" "l" "q"]
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94 _size <- :_num {
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95 #{
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96 num <- { _num }
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97 string <- { _sizenames get: _num }
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98 = <- :other {
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99 _num = (other num)
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100 }
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101 <= <- :other {
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102 _num <= (other num)
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103 }
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104 >= <- :other {
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105 _num >= (other num)
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106 }
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107 > <- :other {
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108 _num > (other num)
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109 }
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110 < <- :other {
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111 _num < (other num)
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112 }
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113 }
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114 }
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115 byte <- _size: 0
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116 word <- _size: 1
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117 long <- _size: 2
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118 quad <- _size: 3
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119
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120 _retr <- #{
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121 isInteger? <- { false }
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122 register? <- { true }
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123 argument? <- { false }
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124 return? <- { true }
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125 string <- { "retr" }
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126 = <- :other {
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127 (not: (other isInteger?)) && (other register?) && (other return?)
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128 }
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129 != <- :other {
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130 not: self = other
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131 }
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132 recordUsage:at:withSize <- :tracker :address :size {
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133 //TODO: Figure out what tracking is necessary here
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134 }
185
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135 }
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136
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137 _condnames <- #[
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138 "eq"
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139 "neq"
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140 "ge"
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141 "le"
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142 "gr"
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143 "ls"
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144 "uge"
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145 "ule"
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146 "ugr"
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147 "uls"
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148 ]
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149 condition <- :num {
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150 #{
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151 cc <- { num }
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152 string <- { _condnames get: num }
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153 = <- :other { num = (other cc) }
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154 }
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155 }
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156 _eq <- condition: 0
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157 _neq <- condition: 1
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158 _ge <- condition: 2
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159 _le <- condition: 3
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160 _gr <- condition: 4
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161 _ls <- condition: 5
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162 _uge <- condition: 6
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163 _ule <- condition: 7
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164 _ugr <- condition: 8
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165 _uls <- condition: 9
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166
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167 #{
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168 b <- { byte }
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169 w <- { word }
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170 l <- { long }
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171 q <- { quad }
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172
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173 eq <- { _eq }
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174 neq <- { _neq }
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175
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176 //signed conditions
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177 ge <- { _ge }
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178 le <- { _le }
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179 gr <- { _gr }
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180 ls <- { _ls }
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181
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182 //unsigned conditions
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183 uge <- { _uge }
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184 ule <- { _ule }
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185 ugr <- { _ugr }
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186 uls <- { _uls }
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187
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188
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189 reg <- :num {
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190 #{
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191 isInteger? <- { false }
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192 register? <- { true }
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193 argument? <- { false }
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194 return? <- { false }
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195 regnum <- { num }
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196 string <- { "r" . (string: num) }
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197 = <- :other {
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198 (not: (other isInteger?)) && (other register?) && (not: (other argument?)) && (not: (other return?)) && num = (other regnum)
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199 }
189
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200 != <- :other {
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201 not: self = other
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202 }
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203 recordUsage:at:withSize <- :tracker :address :size {
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204 tracker reg: self usedAt: address withSize: size
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205 }
185
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206 }
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207 }
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208 arg <- :num {
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209 #{
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210 isInteger? <- { false }
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211 register? <- { true }
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212 argument? <- { true }
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213 return? <- { false }
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214 argnum <- { num }
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215 string <- { "a" . (string: num) }
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216 = <- :other {
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217 (not: (other isInteger?)) && (other register?) && (other argument?) && num = (other regnum)
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218 }
189
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219 != <- :other {
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220 not: self = other
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221 }
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222 recordUsage:at:withSize <- :tracker :address :size {
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223 tracker arg: self usedAt: address withSize: size
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224 }
185
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225 }
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226 }
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227 retr <- { _retr }
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228
189
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229 base:offset <- :_base :_offset {
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230 #{
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231 base <- { _base }
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232 offset <- { _offset }
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233 string <- {
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234 start <- if: _offset = 0 { "" } else: { (string: _offset) }
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235 start . "[" . (string: _base) . "]"
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236 }
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237 recordUsage:at:withSize <- :tracker :address :size {
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238 _base recordUsage: tracker at: address withSize: size
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239 }
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240 }
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241 }
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242
185
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243 add <- :ina inb out size {
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244 op3: _add a: ina b: inb out: out size: size
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245 }
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246
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247 sub <- :ina inb out size {
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248 op3: _sub a: ina b: inb out: out size: size
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249 }
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250
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251 cmp <- :ina inb out size {
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252 op3: _cmp a: ina b: inb out: out size: size
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253 }
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254
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255 and <- :ina inb out size {
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256 op3: _and a: ina b: inb out: out size: size
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257 }
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258
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259 or <- :ina inb out size {
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260 op3: _or a: ina b: inb out: out size: size
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261 }
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262
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263 xor <- :ina inb out size {
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264 op3: _xor a: ina b: inb out: out size: size
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265 }
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266
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267 bnot <- :in out size {
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268 op2: _not in: in out: out size: size
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269 }
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270
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271 sl <- :shift in out size {
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272 op3: _sl a: shift b: in out: out size: size
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273 }
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274
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275 asr <- :shift in out size {
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276 op3: _asr a: shift b: in out: out size: size
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277 }
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278
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279 lsr <- :shift in out size {
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280 op3: _lsr a: shift b: in out: out size: size
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281 }
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282
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283 rol <- :rot in out size {
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284 op3: _rol a: rot b: in out: out size: size
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285 }
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286
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287 ror <- :rot in out size {
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288 op3: _ror a: rot b: in out: out size: size
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289 }
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290
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291 mov <- :in out size {
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292 op2: _mov in: in out: out size: size
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293 }
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294
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295 call:withArgs <- :_target :_args {
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296 #{
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297 opcode <- { _call }
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298 target <- { _target }
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299 args <- { _args }
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300 numops <- { 0 }
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301 name <- { _names get: _call }
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302 string <- {
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303 argstr <- _args map: :el {
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304 string: el
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305 }
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306 name . " " . (string: _target) . " " . (argstr join: " ")
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307 }
189
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308 recordUsage:at <- :tracker :address {
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309 if: (not: (_target isString?)) {
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310 //TODO: use size l for 32-bit targets or an abstract pointer size
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311 _target recordUsage: tracker at: address withSize: q
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312 }
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313 foreach: _args :_ arg {
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314 //TODO: have some mechanism for properly expressing sizes of arguments
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315 arg recordUsage: tracker at: address withSize: q
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316 }
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317 }
185
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318 }
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319 }
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320
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321 return <- :val size {
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322 op1: _ret arg: val size: size
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parents:
diff changeset
323 }
181d8754a2ae Initial work on IL module
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parents:
diff changeset
324 skipIf <- :_cond _toskip {
181d8754a2ae Initial work on IL module
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parents:
diff changeset
325 #{
181d8754a2ae Initial work on IL module
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parents:
diff changeset
326 opcode <- { _skipif }
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parents:
diff changeset
327 toskip <- { _toskip }
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parents:
diff changeset
328 cond <- { _cond }
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parents:
diff changeset
329 numops <- { 0 }
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parents:
diff changeset
330 name <- { _names get: _skipif }
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parents:
diff changeset
331 string <- {
181d8754a2ae Initial work on IL module
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parents:
diff changeset
332 block <- (_toskip map: :el { string: el }) join: "\n\t"
181d8754a2ae Initial work on IL module
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parents:
diff changeset
333 if: (_toskip length) > 0 {
181d8754a2ae Initial work on IL module
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parents:
diff changeset
334 block <- "\n\t" . block . "\n"
181d8754a2ae Initial work on IL module
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parents:
diff changeset
335 }
181d8754a2ae Initial work on IL module
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parents:
diff changeset
336 name . " " . (string: _cond) . " {" . block . "}"
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
337 }
189
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
338 recordUsage:at <- :tracker :address {
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parents: 185
diff changeset
339 foreach: _toskip :idx inst {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
340 inst recordUsage: tracker at: idx | address
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
341 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
342 }
185
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
343 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
344 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
345
189
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
346 allocRegs:withSource <- :instarr:regSrc {
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diff changeset
347 _regMap <- dict linear
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diff changeset
348 _argMap <- dict linear
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diff changeset
349
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
350 _usageTracker <- :_firstUsage {
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diff changeset
351 #{
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
352 firstUsage <- _firstUsage
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diff changeset
353 lastUsage <- _firstUsage
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diff changeset
354 useCount <- 0
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
355 maxSize <- byte
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
356 usedAt:withSize <- :address :size {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
357 useCount <- useCount + 1
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
358 lastUsage <- address
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
359 if: size > maxSize {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
360 maxSize <- size
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
361 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
362 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
363 string <- {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
364 "Uses: " . useCount . ", FirstUse: " . (firstUsage join: ":") . ", Last Use: " . (lastUsage join: ":") . ", Max Size: " . maxSize
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
365 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
366 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
367 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
368
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
369 _maxUses <- 0
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
370 _maxUseReg <- false
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
371 regUsage <- #{
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
372 reg:usedAt:withSize <- :reg :address :size {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
373 usage <- _regMap get: reg elseSet: {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
374 _usageTracker: address
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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diff changeset
375 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
376 usage usedAt: address withSize: size
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
377 if: (usage useCount) > _maxUses {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
378 _maxUses <- usage useCount
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
379 _maxUseReg <- reg
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
380 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
381 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
382 arg:usedAt:withSize <- :arg :address :size {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
383 usage <- _argMap get: arg elseSet: {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
384 _usageTracker: [0 0]
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
385 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
386 usage usedAt: address withSize: size
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
387 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
388 print <- {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
389 foreach: _regMap :reg usage {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
390 print: (string: reg) . " | " . (string: usage) . "\n"
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
391 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
392 foreach: _argMap :arg usage {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
393 print: (string: arg) . " | " . (string: usage) . "\n"
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
394 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
395 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
396 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
397 foreach: instarr :idx inst {
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
398 inst recordUsage: regUsage at: [idx]
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
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parents: 185
diff changeset
399 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
400 print: regUsage
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
401 }
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
402
185
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
403 //used to convert IL to a format suitable for a 2-operand architecture
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
404 //should be run after register allocation (I think....)
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
405 to2Op <- :instarr {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
406 instarr fold: #[] with: :newarr inst {
181d8754a2ae Initial work on IL module
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parents:
diff changeset
407 if: (inst numops) = 3 {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
408 if: (inst inb) = (inst out) {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
409 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size))
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
410 } else: {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
411 if: (inst commutative?) && (inst ina) = (inst out) {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
412 newarr append: (op2: (inst opcode) in: (inst inb) out: (inst out) size: (inst size))
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
413 } else: {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
414 newarr append: (mov: (inst inb) (inst out) (inst size))
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
415 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size))
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
416 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
417 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
418 } else: {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
419 if: (inst numops) = 2 && (inst opcode) != _mov {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
420 if: (inst in) != (inst out) {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
421 newarr append: (mov: (inst in) (inst out) (inst size))
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
422 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
423 newarr append: (op1: (inst opcode) val: (inst out) size: (inst size))
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
424 } else: {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
425 newarr append: inst
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
426 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
427 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
428 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
429 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
430
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
431 main <- {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
432 fib <- #[
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
433 sub: 2 (arg: 0) (reg: 0) q
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
434 skipIf: ge #[
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
435 return: 1 q
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
436 ]
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
437 call: "fib" withArgs: #[reg: 0]
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
438 mov: retr (reg: 1) q
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
439 add: 1 (reg: 0) (reg: 2) q
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
440 call: "fib" withArgs: #[reg: 2]
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
441 add: retr (reg: 1) (reg: 3) q
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
442 return: (reg: 3) q
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
443 ]
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
444 print: "Original:\n\n"
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
445 foreach: fib :idx inst {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
446 print: (string: inst) . "\n"
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
447 }
189
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
448 print: "\n\nUsage:\n\n"
a45e535f7742 Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents: 185
diff changeset
449 allocRegs: fib withSource: false
185
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
450 fib2 <- to2Op: fib
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
451 print: "\n\n2-Operand:\n\n"
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
452 foreach: fib2 :idx inst {
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
453 print: (string: inst) . "\n"
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
454 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
455 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
456 }
181d8754a2ae Initial work on IL module
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
457 }