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Add call instruction to x86 module
author Mike Pavone <pavone@retrodev.com>
date Sat, 24 Aug 2013 16:21:42 -0700
parents 270d31c6c4cd
children 97f107b9e8d3
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1 {
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2 regnames <- #["rax" "rcx" "rdx" "rbx" "rsp" "rbp" "rsi" "rdi" "r8" "r9" "r10" "r11" "r12" "r13" "r14" "r15"]
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3 uppernames <- #["ah" "ch" "dh" "bh"]
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4 ireg <- :regnum {
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5 #{
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6 num <- { regnum }
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7 reg <- { regnum and 7u8}
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8 string <- { regnames get: regnum }
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9 rm <- :tail { reg or 0xC0u8 | tail }
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10 validforSize? <- :size { true }
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11 isInteger? <- { false }
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12 register? <- { true }
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13 label? <- { false }
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14 upper? <- { true }
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15 needsRex? <- { regnum >= 8u8 }
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16 rexBitReg <- {
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17 if: needsRex? {
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18 4u8
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19 } else: {
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20 0u8
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21 }
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22 }
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23 rexBitRM <- {
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24 if: needsRex? {
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25 1u8
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26 } else: {
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27 0u8
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28 }
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29 }
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30 = <- :other {
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31 (not: (other isInteger?)) && (other register?) && (not: (other upper?)) && regnum = (other num)
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32 }
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33 }
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34 }
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35
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36 upper <- :regnum {
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37 #{
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38 num <- { regnum }
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39 reg <- { regnum }
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40 string <- { uppernames get: regnum - 4 }
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41 rm <- :tail { regnum or 0xC0u8 | tail }
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42 validforSize? <- :size {
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43 size = byte
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44 }
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45 isInteger? <- { false }
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46 register? <- { true }
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47 label? <- { false }
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48 upper? <- { true }
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49 needsRex? <- { false }
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50 = <- :other {
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51 (not: (other isInteger?)) && (other register?) && (other upper?) && regnum = (other num)
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52 }
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53 }
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54 }
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55 fakesrc <- #{
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56 needsRex? <- { false }
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57 rexBitReg <- { 0u8 }
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58 rexBitRM <- { 0u8 }
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59 }
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60 size <- :s {
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61 #{
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62 num <- { s }
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63 = <- :other {
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64 s = (other num)
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65 }
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66 > <- :other {
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67 s > (other num)
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68 }
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69 >= <- :other {
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70 s >= (other num)
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71 }
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72 < <- :other {
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73 s < (other num)
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74 }
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75 <= <- :other {
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76 s <= (other num)
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77 }
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78 needsRex? <- { s = 3 }
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79 rexBit <- {
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80 if: needsRex? {
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81 0x08u8
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82 } else: {
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83 0u8
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84 }
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85 }
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86 }
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87 }
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88 byte <- size: 0
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89 word <- size: 1
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90 dword <- size: 2
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91 qword <- size: 3
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92
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93 size_bit <- :opcode size {
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94 if: size = byte {
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95 opcode
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96 } else: {
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97 opcode or 1u8
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98 }
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99 }
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100 opex <- :val {
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101 #{
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102 reg <- { val }
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103 string <- { "opex " . val}
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104 }
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105 }
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106
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107 mod_rm:withTail <- :register regmem :end {
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108 l <- regmem rm: end
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109 (l value) or ( lshift: (register reg) by: 3u8) | (l tail)
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110 }
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111
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112 mod_rm <- :reg rm {
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113 mod_rm: reg rm withTail: []
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114 }
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115
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116 int_op:withTail <- :value size :tail {
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117 if: size >= dword {
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118 tail <- (uint8: (rshift: value by: 16u64)) | (uint8: (rshift: value by: 24u64)) | tail
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119 }
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120 if: size >= word {
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121 tail <- (uint8: (rshift: value by: 8u64)) | tail
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122 }
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123 (uint8: value) | tail
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124 }
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125 int_op <- :value size {
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126 int_op: value size withTail: []
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127 }
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128 //used for mov instructions that support 64-bit immediate operands/offsets
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129 int_op64 <- :value size {
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130 tail <- []
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131 if: size = qword {
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132 tail <- (uint8: (rshift: value by: 32u64)) | (uint8: (rshift: value by: 40u64)) | (uint8: (rshift: value by: 48u64)) | (uint8: (rshift: value by: 56u64)) | tail
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133 }
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134 int_op: value size withTail: tail
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135 }
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136
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137 prefix:withInstruction <- :reg rm size :inst {
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138 if: size = word {
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139 inst <- 0x66u8 | inst
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140 }
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141 if: (size needsRex?) || (reg needsRex?) || (rm needsRex?) {
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142 rex <- 0x40u8 or (size rexBit) or (reg rexBitReg) or (rm rexBitRM)
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143 inst <- rex | inst
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144 }
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145 inst
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146 }
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147
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148 _rax <- ireg: 0u8
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149 _rcx <- ireg: 1u8
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150 _rdx <- ireg: 2u8
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151 _rbx <- ireg: 3u8
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152 _rsp <- ireg: 4u8
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153 _rbp <- ireg: 5u8
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154 _rsi <- ireg: 6u8
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155 _rdi <- ireg: 7u8
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156 _r8 <- ireg: 8u8
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157 _r9 <- ireg: 9u8
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158 _r10 <- ireg: 10u8
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159 _r11 <- ireg: 11u8
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160 _r12 <- ireg: 12u8
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161 _r13 <- ireg: 13u8
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162 _r14 <- ireg: 14u8
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163 _r15 <- ireg: 15u8
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164 _ah <- upper: 4u8
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165 _ch <- upper: 5u8
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166 _dh <- upper: 6u8
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167 _bh <- upper: 7u8
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168
180
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169 inst <- :ilist {
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170 #{
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171 length <- { ilist length }
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172 flattenTo:at <- :dest :idx {
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173 ilist fold: idx with: :idx byte {
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174 dest set: idx byte
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175 idx + 1
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176 }
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177 }
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178 }
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179 }
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180
175
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181 op:withCode:withImmed:withOpEx <- :src dst size :normal :immed :myopex {
174
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182 reg <- src
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183 rm <- dst
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184 base <- if: (src isInteger?) {
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185 reg <- fakesrc
175
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186 (size_bit: immed size) | (mod_rm: (opex: myopex) dst withTail: (int_op: src size))
174
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187 } else: {
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188 if: (src register?) {
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189 (size_bit: normal size) | (mod_rm: src dst)
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190 } else: {
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191 reg <- dst
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192 rm <- src
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193 (size_bit: normal or 0x02u8 size) | (mod_rm: dst src)
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194 }
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195 }
180
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196 inst: (prefix: reg rm size withInstruction: base)
174
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197 }
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198
175
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199 op:withCode:withImmed:withImmedRax:withOpEx:withByteExtend <- :src dst size :normal :immed :immedRax :myopex :byteExt {
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200 reg <- src
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201 rm <- dst
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202 if: (src isInteger?) {
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203 reg <- fakesrc
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204 base <- if: size > byte && (((src signed?) && src < 128 && src >= -128) || ((not: (src signed?)) && src < 256)) {
179
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205 byteExt | (mod_rm: (opex: myopex) dst withTail: [(uint8: src)])
175
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206 } else: {
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207 if: dst = _rax {
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208 (size_bit: immedRax size) | (int_op: src size)
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209 } else: {
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210 (size_bit: immed size) | (mod_rm: (opex: myopex) dst withTail: (int_op: src size))
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211 }
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212 }
180
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213 inst: (prefix: reg rm size withInstruction: base)
175
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214 } else: {
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215 op: src dst size withCode: normal withImmed: immed withOpEx: myopex
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216 }
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217 }
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218
174
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219 #{
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220 rax <- { _rax }
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221 rcx <- { _rcx }
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222 rdx <- { _rdx }
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223 rbx <- { _rbx }
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224 rsp <- { _rsp }
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225 rbp <- { _rbp }
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226 rsi <- { _rsi }
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227 rdi <- { _rdi }
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228 r8 <- { _r8 }
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229 r9 <- { _r9 }
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230 r10 <- { _r10 }
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231 r11 <- { _r11 }
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232 r12 <- { _r12 }
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233 r13 <- { _r13 }
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234 r14 <- { _r14 }
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235 r15 <- { _r15 }
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236 ah <- { _ah }
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237 ch <- { _ch }
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238 dh <- { _dh }
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239 bh <- { _bh }
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240
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241 b <- { byte }
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242 w <- { word }
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243 d <- { dword }
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244 q <- { qword }
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245
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246 add <- :src dst size {
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247 op: src dst size withCode: 0u8 withImmed: 0x80u8 withImmedRax: 0x04u8 withOpEx: 0u8 withByteExtend: 0x83u8
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248 }
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249
175
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250 sub <- :src dst size {
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251 op: src dst size withCode: 0x28u8 withImmed: 0x80u8 withImmedRax: 0x2Cu8 withOpEx: 5u8 withByteExtend: 0x83u8
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252 }
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253
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254 mov <- :src dst size {
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255 reg <- src
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256 rm <- dst
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257 if: (src isInteger?) && (dst register?) {
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258 opval <- if: size = byte { 0xB0u8 } else: { 0xB8u8 }
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259 base <- opval | (int_op64: src size)
180
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260 inst: (prefix: fakesrc rm size withInstruction: base)
175
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261 } else: {
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262 op: src dst size withCode: 0x88u8 withImmed: 0xC6u8 withOpEx: 0u8
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263 }
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264 }
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265
180
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266 ret <- { inst: [ 0xC3u8 ] }
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267
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268 label <- {
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269 _offset <- -1
181
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270 _address <- 0u64
180
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271 _forwardRefs <- #[]
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272 #{
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273 length <- { 0 }
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274 hasOffset? <- { _offset >= 0 }
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275 offset <- { _offset }
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276 register? <- { false }
181
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277 label? <- { true }
180
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278 flattenTo:at <- :dest :idx {
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279 if: (not: hasOffset?) {
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280 _offset <- idx
181
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281 _address <- dest addressAt: idx
180
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282 foreach: _forwardRefs :idx fun {
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283 fun: _offset
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284 }
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285 _forwardRefs <- #[]
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286 }
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287 idx
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288 }
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289 withOffset:else <- :fun :elsefun {
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290 if: hasOffset? {
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291 fun: _offset
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292 } else: {
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293 _forwardRefs append: fun
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294 elsefun:
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295 }
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296 }
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297 }
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298 }
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299
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300 jmp <- :jmpDest {
181
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301 if: (jmpDest label?) {
180
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302 _size <- -1
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303 #{
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304 length <- { if: _size < 0 { 5 } else: { _size } }
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305 flattenTo:at <- :dest :idx {
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306 jmpDest withOffset: :off {
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307 if: _size < 0 {
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308 rel <- off - (idx + 2)
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309 if: rel < 128 && rel >= -128 {
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310 _size <- 2
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311 } else: {
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312 rel <- rel - 2
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313 if: rel < 32768 && rel >= -32768 {
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314 _size <- 4
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315 } else: {
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316 _size <- 5
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317 }
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318 }
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319 }
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320 rel <- off - (idx + _size)
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321 if: _size = 2 {
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322 dest set: idx 0xEBu8
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323 dest set: (idx + 1) (uint8: rel)
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324 } else: {
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325 if: _size = 4 {
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326 dest set: idx 0x66u8
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327 dest set: (idx + 1) 0xE9u8
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328 dest set: (idx + 2) (uint8: rel)
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329 dest set: (idx + 3) (uint8: (rshift: rel by: 8))
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330 } else: {
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331 dest set: idx 0xE9u8
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332 dest set: (idx + 1) (uint8: rel)
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333 dest set: (idx + 2) (uint8: (rshift: rel by: 8))
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334 dest set: (idx + 3) (uint8: (rshift: rel by: 16))
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335 dest set: (idx + 4) (uint8: (rshift: rel by: 24))
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336 }
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337 }
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338 } else: {
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339 _size <- 5
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340 }
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341 idx + _size
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342 }
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343 }
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344 } else: {
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345 inst: 0xFFu8 | (mod_rm: (opex: 5u8) jmpDest)
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346 }
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347 }
175
20b6041a8b23 Small refactor in x86 module. Added a few more instructions.
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348
181
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349 call <- :callDest {
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350 if: (callDest label?) {
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351 #{
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352 length <- { 5 }
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353 flattenTo:at <- :dest :idx {
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354 dest set: idx 0xE8u8
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355 callDest withOffset: :off {
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356 rel <- off - (idx + 5)
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357 dest set: (idx + 1) (uint8: rel)
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358 dest set: (idx + 2) (uint8: (rshift: rel by: 8))
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359 dest set: (idx + 3) (uint8: (rshift: rel by: 16))
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360 dest set: (idx + 4) (uint8: (rshift: rel by: 24))
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361 } else: {
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362 }
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363 idx + 5
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364 }
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365 }
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366 } else: {
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367 inst: 0xFFu8 | (mod_rm: (opex: 2u8) callDest)
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368 }
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369 }
174
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370
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371 main <- {
180
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372 foo <- label:
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373 bar <- label:
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374 baz <- label:
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375 prog <- #[
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376 mov: rdi rax q
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377 sub: 1 rdi q
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378 add: rdi rax q
180
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379 jmp: bar
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380 foo
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381 ret:
180
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382 bar
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383 sub: 13 rax q
181
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384 call: baz
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385 jmp: foo
181
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386 baz
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387 add: 1 rax q
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388 ret:
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389 ]
180
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390
179
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391 ba <- bytearray executableFromBytes: prog
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392 res <- ba runWithArg: 24u64
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393 print: (string: res) . "\n"
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394 0
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395 }
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396 }
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397 }