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annotate vdp.h @ 1421:0ba6760f4c6d

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Added ROM DB entry for Super 19-in-1 based on hash reported by Sasha
author Michael Pavone <pavone@retrodev.com>
date Mon, 26 Jun 2017 23:40:07 -0700
parents b56c8c51ca5d
children 4e5797b3935a
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #ifndef VDP_H_
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7 #define VDP_H_
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8
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9 #include <stdint.h>
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10 #include <stdio.h>
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11 #include "system.h"
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12
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13 #define VDP_REGS 24
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14 #define CRAM_SIZE 64
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15 #define VSRAM_SIZE 40
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16 #define VRAM_SIZE (64*1024)
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17 #define BORDER_LEFT 13
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18 #define BORDER_RIGHT 14
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19 #define HORIZ_BORDER (BORDER_LEFT+BORDER_RIGHT)
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20 #define LINEBUF_SIZE (320+HORIZ_BORDER) //H40 + full border
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21 #define BORDER_BOTTOM 13 //TODO: Replace with actual value
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22 #define MAX_DRAWS 40
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23 #define MAX_DRAWS_H32 32
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24 #define MAX_DRAWS_H32_MODE4 8
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25 #define MAX_SPRITES_LINE 20
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26 #define MAX_SPRITES_LINE_H32 16
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27 #define MAX_SPRITES_FRAME 80
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28 #define MAX_SPRITES_FRAME_H32 64
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29 #define SAT_CACHE_SIZE (MAX_SPRITES_FRAME * 4)
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30
230
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31 #define FBUF_SHADOW 0x0001
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32 #define FBUF_HILIGHT 0x0010
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33 #define FBUF_MODE4 0x0100
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34 #define DBG_SHADOW 0x10
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35 #define DBG_HILIGHT 0x20
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36 #define DBG_PRIORITY 0x8
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37 #define DBG_SRC_MASK 0x7
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38 #define DBG_SRC_A 0x1
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39 #define DBG_SRC_W 0x2
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40 #define DBG_SRC_B 0x3
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41 #define DBG_SRC_S 0x4
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42 #define DBG_SRC_BG 0x0
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43
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44 #define MCLKS_LINE 3420
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45
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46 #define FLAG_DOT_OFLOW 0x01
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47 #define FLAG_CAN_MASK 0x02
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48 #define FLAG_MASKED 0x04
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49 #define FLAG_WINDOW 0x08
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50 #define FLAG_PENDING 0x10
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51 #define FLAG_READ_FETCHED 0x20
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52 #define FLAG_DMA_RUN 0x40
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53 #define FLAG_DMA_PROG 0x80
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54
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55 #define FLAG2_VINT_PENDING 0x01
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56 #define FLAG2_HINT_PENDING 0x02
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57 #define FLAG2_READ_PENDING 0x04
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58 #define FLAG2_SPRITE_COLLIDE 0x08
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59 #define FLAG2_REGION_PAL 0x10
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60 #define FLAG2_EVEN_FIELD 0x20
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61 #define FLAG2_BYTE_PENDING 0x40
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62 #define FLAG2_PAUSE 0x80
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63
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64 #define DISPLAY_ENABLE 0x40
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65
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66 enum {
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67 REG_MODE_1=0,
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68 REG_MODE_2,
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69 REG_SCROLL_A,
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70 REG_WINDOW,
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71 REG_SCROLL_B,
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72 REG_SAT,
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73 REG_STILE_BASE,
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74 REG_BG_COLOR,
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75 REG_X_SCROLL,
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76 REG_Y_SCROLL,
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77 REG_HINT,
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78 REG_MODE_3,
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79 REG_MODE_4,
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80 REG_HSCROLL,
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81 REG_BGTILE_BASE,
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82 REG_AUTOINC,
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83 REG_SCROLL,
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84 REG_WINDOW_H,
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85 REG_WINDOW_V,
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86 REG_DMALEN_L,
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87 REG_DMALEN_H,
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88 REG_DMASRC_L,
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89 REG_DMASRC_M,
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90 REG_DMASRC_H
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91 } vdp_regs;
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92
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93 //Mode reg 1
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94 #define BIT_VSCRL_LOCK 0x80
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95 #define BIT_HSCRL_LOCK 0x40
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96 #define BIT_COL0_MASK 0x20
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97 #define BIT_HINT_EN 0x10
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98 #define BIT_SPRITE_8PX 0x08
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99 #define BIT_PAL_SEL 0x04
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100 #define BIT_MODE_4 BIT_PAL_SEL
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101 #define BIT_HVC_LATCH 0x02
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102 #define BIT_DISP_DIS 0x01
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103
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104 //Mode reg 2
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105 #define BIT_128K_VRAM 0x80
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106 #define BIT_DISP_EN 0x40
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107 #define BIT_VINT_EN 0x20
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108 #define BIT_DMA_ENABLE 0x10
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109 #define BIT_PAL 0x08
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110 #define BIT_MODE_5 0x04
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111 #define BIT_SPRITE_SZ 0x02
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112
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113 //Mode reg 3
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114 #define BIT_EINT_EN 0x10
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115 #define BIT_VSCROLL 0x04
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116
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117 //Mode reg 4
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118 #define BIT_H40 0x01
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119 #define BIT_HILIGHT 0x8
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120 #define BIT_DOUBLE_RES 0x4
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121 #define BIT_INTERLACE 0x2
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122
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123 //Test register
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124 #define TEST_BIT_DISABLE 0x40
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125
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126 typedef struct {
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127 uint16_t address;
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128 int16_t x_pos;
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129 uint8_t pal_priority;
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130 uint8_t h_flip;
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131 } sprite_draw;
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132
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133 typedef struct {
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134 uint8_t size;
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135 uint8_t index;
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diff changeset
136 int16_t y;
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diff changeset
137 } sprite_info;
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138
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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parents: 470
diff changeset
139 #define FIFO_SIZE 4
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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parents: 470
diff changeset
140
20
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diff changeset
141 typedef struct {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
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parents: 43
diff changeset
142 uint32_t cycle;
1318
bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents: 1267
diff changeset
143 uint32_t address;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
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parents: 43
diff changeset
144 uint16_t value;
138
aa3e1bb338c9 Fix VDP reads
Mike Pavone <pavone@retrodev.com>
parents: 137
diff changeset
145 uint8_t cd;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
146 uint8_t partial;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
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parents: 43
diff changeset
147 } fifo_entry;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
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parents: 43
diff changeset
148
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
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parents: 43
diff changeset
149 typedef struct {
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
150 fifo_entry fifo[FIFO_SIZE];
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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parents: 470
diff changeset
151 int32_t fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
152 int32_t fifo_read;
1318
bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents: 1267
diff changeset
153 uint32_t address;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
154 uint32_t serial_address;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
155 uint8_t cd;
56
a28b1dfe1af2 Fix CRAM and possibly VSRAM writes
Mike Pavone <pavone@retrodev.com>
parents: 54
diff changeset
156 uint8_t flags;
138
aa3e1bb338c9 Fix VDP reads
Mike Pavone <pavone@retrodev.com>
parents: 137
diff changeset
157 uint8_t regs[VDP_REGS];
20
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parents:
diff changeset
158 //cycle count in MCLKs
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parents:
diff changeset
159 uint32_t cycles;
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 710
diff changeset
160 uint32_t pending_vint_start;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 710
diff changeset
161 uint32_t pending_hint_start;
20
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parents:
diff changeset
162 uint8_t *vdpmem;
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parents:
diff changeset
163 //stores 2-bit palette + 4-bit palette index + priority for current sprite line
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parents:
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164 uint8_t *linebuf;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1019
diff changeset
165 //pointer to current line in framebuffer
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1019
diff changeset
166 uint32_t *output;
1343
033dda2d4598 Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1339
diff changeset
167 uint32_t *done_output;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
168 uint32_t *fb;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
169 system_header *system;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
170 uint16_t cram[CRAM_SIZE];
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
171 uint32_t colors[CRAM_SIZE*4];
437
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
172 uint32_t debugcolors[1 << (3 + 1 + 1 + 1)];//3 bits for source, 1 bit for priority, 1 bit for shadow, 1 bit for hilight
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
173 uint16_t vsram[VSRAM_SIZE];
710
4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Michael Pavone <pavone@retrodev.com>
parents: 697
diff changeset
174 uint16_t vscroll_latch[2];
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1019
diff changeset
175 uint32_t output_pitch;
697
7f96bd1cb1be Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents: 680
diff changeset
176 uint32_t frame;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 494
diff changeset
177 uint16_t vcounter;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
178 uint16_t inactive_start;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
179 uint16_t border_top;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
180 uint16_t border_bot;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
181 uint16_t hscroll_a;
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parents:
diff changeset
182 uint16_t hscroll_b;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
183 uint16_t h40_lines;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
184 uint16_t output_lines;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
185 sprite_draw sprite_draw_list[MAX_DRAWS];
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parents:
diff changeset
186 sprite_info sprite_info_list[MAX_SPRITES_LINE];
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 980
diff changeset
187 uint8_t sat_cache[SAT_CACHE_SIZE];
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
188 uint16_t col_1;
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parents:
diff changeset
189 uint16_t col_2;
480
0737953132ad Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents: 478
diff changeset
190 uint16_t hv_latch;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
191 uint16_t prefetch;
1318
bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents: 1267
diff changeset
192 uint16_t test_port;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1333
diff changeset
193 uint8_t hslot; //hcounter/2
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1333
diff changeset
194 uint8_t sprite_index;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1333
diff changeset
195 uint8_t sprite_draws;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1333
diff changeset
196 int8_t slot_counter;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1333
diff changeset
197 int8_t cur_slot;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1333
diff changeset
198 uint8_t max_sprites_frame;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1333
diff changeset
199 uint8_t max_sprites_line;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
200 uint8_t fetch_tmp[2];
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
201 uint8_t v_offset;
131
8fc8e46be691 Fix bug that was causing DMA fills to lock up under certain circumstances
Mike Pavone <pavone@retrodev.com>
parents: 75
diff changeset
202 uint8_t dma_cd;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
203 uint8_t hint_counter;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
204 uint8_t flags2;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
205 uint8_t double_res;
426
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
206 uint8_t b32;
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
207 uint8_t buf_a_off;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
208 uint8_t buf_b_off;
437
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
209 uint8_t debug;
722
8f5339961903 Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents: 717
diff changeset
210 uint8_t debug_pal;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
211 uint8_t pending_byte;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
212 uint8_t state;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
213 uint8_t *tmp_buf_a;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
214 uint8_t *tmp_buf_b;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
215 } vdp_context;
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parents:
diff changeset
216
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
217 void init_vdp_context(vdp_context * context, uint8_t region_pal);
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 722
diff changeset
218 void vdp_free(vdp_context *context);
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
219 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
220 void vdp_run_context(vdp_context * context, uint32_t target_cycles);
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
221 //runs from current cycle count to VBLANK for the current mode, returns ending cycle count
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
222 uint32_t vdp_run_to_vblank(vdp_context * context);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
223 //runs until the target cycle is reached or the current DMA operation has completed, whicever comes first
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
224 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles);
424
7e8e179116af Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
225 uint8_t vdp_load_gst(vdp_context * context, FILE * state_file);
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
226 uint8_t vdp_save_gst(vdp_context * context, FILE * outfile);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
227 int vdp_control_port_write(vdp_context * context, uint16_t value);
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
228 void vdp_control_port_write_pbc(vdp_context * context, uint8_t value);
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 138
diff changeset
229 int vdp_data_port_write(vdp_context * context, uint16_t value);
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
230 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value);
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
231 void vdp_test_port_write(vdp_context * context, uint16_t value);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
232 uint16_t vdp_control_port_read(vdp_context * context);
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
233 uint16_t vdp_data_port_read(vdp_context * context);
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1135
diff changeset
234 uint8_t vdp_data_port_read_pbc(vdp_context * context);
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1149
diff changeset
235 void vdp_latch_hv(vdp_context *context);
137
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 131
diff changeset
236 uint16_t vdp_hv_counter_read(vdp_context * context);
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
237 uint16_t vdp_test_port_read(vdp_context * context);
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 56
diff changeset
238 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction);
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
239 uint32_t vdp_next_hint(vdp_context * context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
240 uint32_t vdp_next_vint(vdp_context * context);
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 327
diff changeset
241 uint32_t vdp_next_vint_z80(vdp_context * context);
1377
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
242 uint32_t vdp_next_nmi(vdp_context *context);
953
08346262990b Remove the int number argument to vdp_int_ack since it is no longer used
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
243 void vdp_int_ack(vdp_context * context);
322
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
244 void vdp_print_sprite_table(vdp_context * context);
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 322
diff changeset
245 void vdp_print_reg_explain(vdp_context * context);
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
246 void latch_mode(vdp_context * context);
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
247 uint32_t vdp_cycles_to_frame_end(vdp_context * context);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
248 void write_cram(vdp_context * context, uint16_t address, uint16_t value);
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1325
diff changeset
249 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value);
1377
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
250 void vdp_pbc_pause(vdp_context *context);
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
251 void vdp_release_framebuffer(vdp_context *context);
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
252 void vdp_reacquire_framebuffer(vdp_context *context);
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
253
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
254 #endif //VDP_H_