Mercurial > repos > blastem
annotate vdp.h @ 651:103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
author | Michael Pavone <pavone@retrodev.com> |
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date | Tue, 16 Dec 2014 01:10:54 -0800 |
parents | 66cc60215e5c |
children | 4996369f1463 |
rev | line source |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #ifndef VDP_H_ |
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7 #define VDP_H_ |
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8 |
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9 #include <stdint.h> |
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10 #include <stdio.h> |
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11 |
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12 #define VDP_REGS 24 |
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13 #define CRAM_SIZE 64 |
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14 #define VSRAM_SIZE 40 |
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15 #define VRAM_SIZE (64*1024) |
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16 #define LINEBUF_SIZE 320 |
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17 #define FRAMEBUF_ENTRIES (320+27)*(240+27) //PAL active display + full border |
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18 #define MAX_DRAWS 40 |
37 | 19 #define MAX_DRAWS_H32 32 |
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20 #define MAX_SPRITES_LINE 20 |
37 | 21 #define MAX_SPRITES_LINE_H32 16 |
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22 #define MAX_SPRITES_FRAME 80 |
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23 #define MAX_SPRITES_FRAME_H32 64 |
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24 |
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25 #define FBUF_SHADOW 0x0001 |
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26 #define FBUF_HILIGHT 0x0010 |
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27 #define DBG_SHADOW 0x10 |
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28 #define DBG_HILIGHT 0x20 |
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29 #define DBG_PRIORITY 0x8 |
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30 #define DBG_SRC_MASK 0x7 |
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31 #define DBG_SRC_A 0x1 |
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32 #define DBG_SRC_W 0x2 |
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33 #define DBG_SRC_B 0x3 |
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34 #define DBG_SRC_S 0x4 |
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35 #define DBG_SRC_BG 0x0 |
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36 |
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37 #define MCLKS_LINE 3420 |
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38 |
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39 #define FLAG_DOT_OFLOW 0x01 |
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40 #define FLAG_CAN_MASK 0x02 |
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41 #define FLAG_MASKED 0x04 |
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42 #define FLAG_WINDOW 0x08 |
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43 #define FLAG_PENDING 0x10 |
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44 #define FLAG_UNUSED_SLOT 0x20 |
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45 #define FLAG_DMA_RUN 0x40 |
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46 #define FLAG_DMA_PROG 0x80 |
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47 |
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48 #define FLAG2_VINT_PENDING 0x01 |
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49 #define FLAG2_HINT_PENDING 0x02 |
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50 #define FLAG2_READ_PENDING 0x04 |
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51 #define FLAG2_SPRITE_COLLIDE 0x08 |
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52 #define FLAG2_REGION_PAL 0x10 |
75 | 53 |
54 #define DISPLAY_ENABLE 0x40 | |
55 | |
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56 enum { |
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57 REG_MODE_1=0, |
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58 REG_MODE_2, |
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59 REG_SCROLL_A, |
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60 REG_WINDOW, |
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61 REG_SCROLL_B, |
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62 REG_SAT, |
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63 REG_BG_COLOR=7, |
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64 REG_HINT=0xA, |
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65 REG_MODE_3, |
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66 REG_MODE_4, |
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67 REG_HSCROLL, |
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68 REG_AUTOINC=0xF, |
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69 REG_SCROLL, |
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70 REG_WINDOW_H, |
75 | 71 REG_WINDOW_V, |
72 REG_DMALEN_L, | |
73 REG_DMALEN_H, | |
74 REG_DMASRC_L, | |
75 REG_DMASRC_M, | |
76 REG_DMASRC_H | |
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77 } vdp_regs; |
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78 |
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79 //Mode reg 1 |
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80 #define BIT_HINT_EN 0x10 |
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81 #define BIT_PAL_SEL 0x04 |
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82 #define BIT_HVC_LATCH 0x02 |
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83 #define BIT_DISP_DIS 0x01 |
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84 |
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85 //Mode reg 2 |
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86 #define BIT_DISP_EN 0x40 |
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87 #define BIT_VINT_EN 0x20 |
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88 #define BIT_DMA_ENABLE 0x10 |
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89 #define BIT_PAL 0x08 |
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90 #define BIT_MODE_5 0x04 |
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91 |
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92 //Mode reg 3 |
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93 #define BIT_EINT_EN 0x10 |
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94 #define BIT_VSCROLL 0x04 |
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95 |
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96 //Mode reg 4 |
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97 #define BIT_H40 0x01 |
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98 #define BIT_HILIGHT 0x8 |
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99 #define BIT_DOUBLE_RES 0x4 |
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100 #define BIT_INTERLACE 0x2 |
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101 |
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102 typedef struct { |
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103 uint16_t address; |
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104 int16_t x_pos; |
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105 uint8_t pal_priority; |
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106 uint8_t h_flip; |
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107 } sprite_draw; |
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108 |
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109 typedef struct { |
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110 uint8_t size; |
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111 uint8_t index; |
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112 int16_t y; |
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113 } sprite_info; |
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114 |
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115 #define FIFO_SIZE 4 |
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116 |
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117 typedef struct { |
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118 uint32_t cycle; |
138 | 119 uint16_t address; |
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120 uint16_t value; |
138 | 121 uint8_t cd; |
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122 uint8_t partial; |
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123 } fifo_entry; |
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124 |
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125 typedef struct { |
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126 fifo_entry fifo[FIFO_SIZE]; |
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127 int32_t fifo_write; |
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128 int32_t fifo_read; |
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129 uint16_t address; |
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130 uint8_t cd; |
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131 uint8_t flags; |
138 | 132 uint8_t regs[VDP_REGS]; |
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133 //cycle count in MCLKs |
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134 uint32_t cycles; |
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135 uint8_t *vdpmem; |
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136 //stores 2-bit palette + 4-bit palette index + priority for current sprite line |
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137 uint8_t *linebuf; |
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138 //stores 12-bit color + shadow/highlight bits |
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139 void *framebuf; |
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140 void *oddbuf; |
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141 void *evenbuf; |
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142 uint16_t cram[CRAM_SIZE]; |
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143 uint32_t colors[CRAM_SIZE*3]; |
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144 uint32_t debugcolors[1 << (3 + 1 + 1 + 1)];//3 bits for source, 1 bit for priority, 1 bit for shadow, 1 bit for hilight |
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145 uint16_t vsram[VSRAM_SIZE]; |
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146 uint16_t vcounter; |
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147 uint16_t hslot; //hcounter/2 |
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148 uint16_t hscroll_a; |
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149 uint16_t hscroll_b; |
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150 uint8_t latched_mode; |
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151 uint8_t sprite_index; |
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152 uint8_t sprite_draws; |
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153 int8_t slot_counter; |
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154 int8_t cur_slot; |
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155 sprite_draw sprite_draw_list[MAX_DRAWS]; |
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156 sprite_info sprite_info_list[MAX_SPRITES_LINE]; |
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157 uint16_t col_1; |
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158 uint16_t col_2; |
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159 uint16_t hv_latch; |
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160 uint8_t v_offset; |
131
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161 uint8_t dma_cd; |
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162 uint8_t hint_counter; |
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163 uint8_t flags2; |
413
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164 uint8_t double_res; |
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165 uint8_t b32; |
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166 uint8_t buf_a_off; |
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167 uint8_t buf_b_off; |
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168 uint8_t debug; |
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169 uint8_t *tmp_buf_a; |
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170 uint8_t *tmp_buf_b; |
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171 } vdp_context; |
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172 |
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173 void init_vdp_context(vdp_context * context, uint8_t region_pal); |
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174 void vdp_run_context(vdp_context * context, uint32_t target_cycles); |
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175 //runs from current cycle count to VBLANK for the current mode, returns ending cycle count |
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176 uint32_t vdp_run_to_vblank(vdp_context * context); |
75 | 177 //runs until the target cycle is reached or the current DMA operation has completed, whicever comes first |
178 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles); | |
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179 uint8_t vdp_load_gst(vdp_context * context, FILE * state_file); |
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180 uint8_t vdp_save_gst(vdp_context * context, FILE * outfile); |
75 | 181 int vdp_control_port_write(vdp_context * context, uint16_t value); |
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182 int vdp_data_port_write(vdp_context * context, uint16_t value); |
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183 void vdp_test_port_write(vdp_context * context, uint16_t value); |
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184 uint16_t vdp_control_port_read(vdp_context * context); |
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185 uint16_t vdp_data_port_read(vdp_context * context); |
137 | 186 uint16_t vdp_hv_counter_read(vdp_context * context); |
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187 uint16_t vdp_test_port_read(vdp_context * context); |
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188 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction); |
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189 uint32_t vdp_next_hint(vdp_context * context); |
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190 uint32_t vdp_next_vint(vdp_context * context); |
333 | 191 uint32_t vdp_next_vint_z80(vdp_context * context); |
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192 void vdp_int_ack(vdp_context * context, uint16_t int_num); |
322
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193 void vdp_print_sprite_table(vdp_context * context); |
327
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194 void vdp_print_reg_explain(vdp_context * context); |
451
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195 void latch_mode(vdp_context * context); |
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196 uint32_t vdp_cycles_to_frame_end(vdp_context * context); |
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197 |
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198 extern int32_t color_map[1 << 12]; |
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199 |
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200 #endif //VDP_H_ |