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annotate vdp.h @ 432:18cde14e8c10

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Read joystick bindings from config file
author Mike Pavone <pavone@retrodev.com>
date Wed, 10 Jul 2013 23:47:48 -0700
parents add9e2f5c0e3
children e341fd5aa996
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1 #ifndef VDP_H_
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2 #define VDP_H_
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3
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4 #include <stdint.h>
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5 #include <stdio.h>
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6
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7 #define VDP_REGS 24
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8 #define CRAM_SIZE 64
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9 #define VSRAM_SIZE 40
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10 #define VRAM_SIZE (64*1024)
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11 #define LINEBUF_SIZE 320
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12 #define FRAMEBUF_ENTRIES (320+27)*(240+27) //PAL active display + full border
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13 #define MAX_DRAWS 40
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14 #define MAX_DRAWS_H32 32
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15 #define MAX_SPRITES_LINE 20
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16 #define MAX_SPRITES_LINE_H32 16
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17 #define MAX_SPRITES_FRAME 80
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18 #define MAX_SPRITES_FRAME_H32 64
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19
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20 #define FBUF_SHADOW 0x0001
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21 #define FBUF_HILIGHT 0x0010
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22 #define FBUF_BIT_PRIORITY 0x1000
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23 #define FBUF_SRC_MASK 0xE000
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24 #define FBUF_SRC_A 0x0000
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25 #define FBUF_SRC_W 0x2000
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26 #define FBUF_SRC_B 0x4000
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27 #define FBUF_SRC_S 0x6000
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28 #define FBUF_SRC_BG 0x8000
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29
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30 #define MCLKS_LINE 3420
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32 #define FLAG_DOT_OFLOW 0x01
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33 #define FLAG_CAN_MASK 0x02
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34 #define FLAG_MASKED 0x04
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35 #define FLAG_WINDOW 0x08
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36 #define FLAG_PENDING 0x10
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37 #define FLAG_UNUSED_SLOT 0x20
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38 #define FLAG_DMA_RUN 0x40
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39 #define FLAG_DMA_PROG 0x80
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41 #define FLAG2_VINT_PENDING 0x01
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42 #define FLAG2_HINT_PENDING 0x02
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43
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44 #define DISPLAY_ENABLE 0x40
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45
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46 enum {
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47 REG_MODE_1=0,
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48 REG_MODE_2,
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49 REG_SCROLL_A,
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50 REG_WINDOW,
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51 REG_SCROLL_B,
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52 REG_SAT,
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53 REG_BG_COLOR=7,
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54 REG_HINT=0xA,
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55 REG_MODE_3,
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56 REG_MODE_4,
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57 REG_HSCROLL,
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58 REG_AUTOINC=0xF,
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59 REG_SCROLL,
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60 REG_WINDOW_H,
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61 REG_WINDOW_V,
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62 REG_DMALEN_L,
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63 REG_DMALEN_H,
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64 REG_DMASRC_L,
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65 REG_DMASRC_M,
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66 REG_DMASRC_H
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67 } vdp_regs;
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69 //Mode reg 1
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70 #define BIT_HINT_EN 0x10
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71 #define BIT_PAL_SEL 0x04
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72 #define BIT_HVC_LATCH 0x02
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73 #define BIT_DISP_DIS 0x01
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74
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75 //Mode reg 2
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76 #define BIT_DISP_EN 0x40
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77 #define BIT_VINT_EN 0x20
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78 #define BIT_DMA_ENABLE 0x10
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79 #define BIT_PAL 0x08
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80 #define BIT_MODE_5 0x04
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81
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82 //Mode reg 3
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83 #define BIT_EINT_EN 0x10
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84 #define BIT_VSCROLL 0x04
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85
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86 //Mode reg 4
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87 #define BIT_H40 0x01
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88 #define BIT_HILIGHT 0x8
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89 #define BIT_DOUBLE_RES 0x4
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90 #define BIT_INTERLACE 0x2
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91
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92 typedef struct {
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93 uint16_t address;
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94 int16_t x_pos;
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95 uint8_t pal_priority;
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96 uint8_t h_flip;
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97 } sprite_draw;
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98
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99 typedef struct {
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100 uint8_t size;
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101 uint8_t index;
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102 int16_t y;
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103 } sprite_info;
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104
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105 typedef struct {
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106 uint32_t cycle;
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107 uint16_t address;
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108 uint16_t value;
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109 uint8_t cd;
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110 uint8_t partial;
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111 } fifo_entry;
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112
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113 typedef struct {
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114 fifo_entry *fifo_cur;
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115 fifo_entry *fifo_end;
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116 uint16_t address;
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117 uint8_t cd;
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118 uint8_t flags;
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119 uint8_t regs[VDP_REGS];
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120 //cycle count in MCLKs
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121 uint32_t cycles;
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122 uint8_t *vdpmem;
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123 //stores 2-bit palette + 4-bit palette index + priority for current sprite line
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124 uint8_t *linebuf;
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125 //stores 12-bit color + shadow/highlight bits
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126 void *framebuf;
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127 void *oddbuf;
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128 void *evenbuf;
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129 uint16_t cram[CRAM_SIZE];
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130 uint32_t colors[CRAM_SIZE*3];
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131 uint16_t vsram[VSRAM_SIZE];
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132 uint8_t latched_mode;
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133 uint16_t hscroll_a;
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134 uint16_t hscroll_b;
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135 uint8_t sprite_index;
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136 uint8_t sprite_draws;
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137 int8_t slot_counter;
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138 int8_t cur_slot;
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139 sprite_draw sprite_draw_list[MAX_DRAWS];
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140 sprite_info sprite_info_list[MAX_SPRITES_LINE];
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141 uint16_t col_1;
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142 uint16_t col_2;
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143 uint16_t dma_val;
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144 uint8_t v_offset;
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145 uint8_t dma_cd;
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146 uint8_t hint_counter;
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147 uint8_t flags2;
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36fbbced25c2 Initial work on interlace
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148 uint8_t double_res;
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add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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149 uint8_t b32;
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150 uint8_t *tmp_buf_a;
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151 uint8_t *tmp_buf_b;
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152 } vdp_context;
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153
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154 void init_vdp_context(vdp_context * context);
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155 void vdp_run_context(vdp_context * context, uint32_t target_cycles);
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156 //runs from current cycle count to VBLANK for the current mode, returns ending cycle count
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157 uint32_t vdp_run_to_vblank(vdp_context * context);
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158 //runs until the target cycle is reached or the current DMA operation has completed, whicever comes first
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159 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles);
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7e8e179116af Add support for loading GST format savestates
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160 uint8_t vdp_load_gst(vdp_context * context, FILE * state_file);
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a28b1dfe1af2 Fix CRAM and possibly VSRAM writes
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161 void vdp_save_state(vdp_context * context, FILE * outfile);
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162 int vdp_control_port_write(vdp_context * context, uint16_t value);
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139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
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163 int vdp_data_port_write(vdp_context * context, uint16_t value);
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164 uint16_t vdp_control_port_read(vdp_context * context);
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165 uint16_t vdp_data_port_read(vdp_context * context);
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0e7e1ccc0a81 Implemented HV counter
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166 uint16_t vdp_hv_counter_read(vdp_context * context);
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aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
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167 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction);
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168 uint32_t vdp_next_hint(vdp_context * context);
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169 uint32_t vdp_next_vint(vdp_context * context);
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f16136a3835d Update Z80 vint timing
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170 uint32_t vdp_next_vint_z80(vdp_context * context);
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171 void vdp_int_ack(vdp_context * context, uint16_t int_num);
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8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
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172 void vdp_print_sprite_table(vdp_context * context);
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1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
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173 void vdp_print_reg_explain(vdp_context * context);
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174
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175 #endif //VDP_H_