Mercurial > repos > blastem
annotate z80_util.c @ 1710:2344b3650b38
Fix sbc and implement carry/overflow flags for it in CPU DSL
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 28 Jan 2019 22:56:43 -0800 |
parents | c2324849a5e5 |
children | 4fd84c3efc72 |
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1706
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
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1 |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
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2 void z80_read_8(z80_context *context) |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3 { |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
4 context->scratch1 = read_byte(context->scratch1, NULL, &context->opts->gen, context); |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
5 } |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
6 |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
7 void z80_write_8(z80_context *context) |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
8 { |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
9 write_byte(context->scratch2, context->scratch1, NULL, &context->opts->gen, context); |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
10 } |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
11 |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
12 void z80_io_read8(z80_context *context) |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
13 { |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
14 } |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
15 |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
16 void z80_io_write8(z80_context *context) |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
17 { |
c2324849a5e5
Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
18 } |