Mercurial > repos > blastem

annotate z80_util.c @ 1706:c2324849a5e5

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Initial checkin of new WIP Z80 core using CPU DSL
author Michael Pavone <pavone@retrodev.com>
date Mon, 28 Jan 2019 21:16:41 -0800
parents
children 4fd84c3efc72
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
1706
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
1
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
2 void z80_read_8(z80_context *context)
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
3 {
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
4 context->scratch1 = read_byte(context->scratch1, NULL, &context->opts->gen, context);
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
5 }
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
6
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
7 void z80_write_8(z80_context *context)
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
8 {
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
9 write_byte(context->scratch2, context->scratch1, NULL, &context->opts->gen, context);
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
10 }
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
11
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
12 void z80_io_read8(z80_context *context)
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
13 {
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
14 }
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
15
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
16 void z80_io_write8(z80_context *context)
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
17 {
c2324849a5e5 Initial checkin of new WIP Z80 core using CPU DSL
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
18 }