Mercurial > repos > blastem

annotate test.s68 @ 1680:326d1a601fb9

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Fixed crash bug that could occur in a narrow window of time when loading a ROM
author Michael Pavone <pavone@retrodev.com>
date Thu, 17 Jan 2019 10:00:24 -0800
parents 3adbd97f71f2
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
45
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
1 dc.l $0, start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
2 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
3 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
4 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
5 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
6 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
7 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
8 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
9 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
10 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
11 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
12 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
13 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
14 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
15 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
16 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
17 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
18 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
19 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
20 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
21 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
22 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
23 dc.l start
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
24 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
25 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
26 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
27 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
28 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
29 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
30 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
31 dc.l after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
32
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
33 start:
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
34 bra after
3adbd97f71f2 Add vector table to test.s68
Mike Pavone <pavone@retrodev.com>
parents: 12
diff changeset
35 after:
12
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
36 abcd d0, d1
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
37 abcd -(a2), -(a3)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
38 add.b #42, d1
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
39 add.w d3, d4
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
40 add.l d5, (a0)+
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
41 addq.w #5, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
42 addx d6, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
43 addx -(a4), -(a5)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
44 and.w d5, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
45 andi.l #5, (a0)+
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
46 andi #8, CCR
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
47 andi #9, CCR
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
48 foo:
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
49 asl d0, d3
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
50 asr #3, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
51 bne foo
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
52 bchg #5, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
53 bclr #7, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
54 bset #1, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
55 bsr bar
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
56 btst #3, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
57 chk.w #53, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
58 clr d5
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
59 cmp d0, d1
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
60 bar:
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
61 dbra d0, bar
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
62 divs.w d5, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
63 divu.w d3, d4
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
64 eor.w d0, d6
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
65 eori.l #5, d2
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
66 eori #5, ccr
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
67 eori #2700, sr
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
68 exg d5, d6
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
69 ext d2
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
70 illegal
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
71 jmp (a0)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
72 jsr (a5)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
73 lea (a0, 8), a3
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
74 link.w a6, #32
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
75 lsl d0, d3
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
76 lsr #3, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
77 move.b (a0)+, (32, a5)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
78 moveq #5, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
79 move #89, ccr
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
80 move sr, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
81 move #2700, sr
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
82 move a5, usp
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
83 movem.l d0-d3/a4/a6, -(a7)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
84 movep.w d4, (40, a3)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
85 muls.w d6, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
86 mulu.w d2, d4
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
87 nbcd -(a2)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
88 neg.l d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
89 negx.b d5
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
90 nop
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
91 not.b d3
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
92 or.w d5, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
93 ori.b #7, d5
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
94 ori #5, ccr
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
95 ori #2700, sr
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
96 pea (24, a3)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
97 reset
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
98 rol.l #7, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
99 rol.w d5, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
100 ror.w d1, d3
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
101 roxl.l #7, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
102 roxl.w d5, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
103 roxr.w d1, d3
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
104 rte
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
105 rtr
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
106 rts
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
107 sbcd d0, d1
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
108 sbcd -(a2), -(a3)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
109 slt d5
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
110 stop #3
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
111 sub.b #42, d1
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
112 sub.w d3, d4
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
113 sub.l d5, (a0)+
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
114 subq.w #5, d0
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
115 subx d6, d7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
116 subx -(a4), -(a5)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
117 swap d6
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
118 tas (a3)
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
119 trap #7
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
120 trapv
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
121 tst.w (a4)+
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
122 unlk a6
db60ed283d8d Add mising bit instructions to decoder. Add test assembly file containing most distinct instructions.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
123