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annotate vdp.h @ 1199:45c3415508e1

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Update TODO list
author Michael Pavone <pavone@retrodev.com>
date Tue, 24 Jan 2017 23:45:30 -0800
parents e758ddbf0624
children 3772bb926be5
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #ifndef VDP_H_
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7 #define VDP_H_
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8
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9 #include <stdint.h>
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10 #include <stdio.h>
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11 #include "system.h"
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12
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13 #define VDP_REGS 24
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14 #define CRAM_SIZE 64
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15 #define VSRAM_SIZE 40
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16 #define VRAM_SIZE (64*1024)
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17 #define LINEBUF_SIZE (320+27) //H40 + full border
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18 #define BORDER_BOTTOM 13 //TODO: Replace with actual value
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19 #define MAX_DRAWS 40
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20 #define MAX_DRAWS_H32 32
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21 #define MAX_DRAWS_H32_MODE4 8
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22 #define MAX_SPRITES_LINE 20
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23 #define MAX_SPRITES_LINE_H32 16
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24 #define MAX_SPRITES_FRAME 80
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25 #define MAX_SPRITES_FRAME_H32 64
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26 #define SAT_CACHE_SIZE (MAX_SPRITES_FRAME * 4)
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27
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28 #define FBUF_SHADOW 0x0001
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29 #define FBUF_HILIGHT 0x0010
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30 #define FBUF_MODE4 0x0100
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31 #define DBG_SHADOW 0x10
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32 #define DBG_HILIGHT 0x20
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33 #define DBG_PRIORITY 0x8
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34 #define DBG_SRC_MASK 0x7
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35 #define DBG_SRC_A 0x1
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36 #define DBG_SRC_W 0x2
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37 #define DBG_SRC_B 0x3
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38 #define DBG_SRC_S 0x4
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39 #define DBG_SRC_BG 0x0
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40
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41 #define MCLKS_LINE 3420
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42
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43 #define FLAG_DOT_OFLOW 0x01
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44 #define FLAG_CAN_MASK 0x02
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45 #define FLAG_MASKED 0x04
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46 #define FLAG_WINDOW 0x08
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47 #define FLAG_PENDING 0x10
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48 #define FLAG_READ_FETCHED 0x20
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49 #define FLAG_DMA_RUN 0x40
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50 #define FLAG_DMA_PROG 0x80
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51
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52 #define FLAG2_VINT_PENDING 0x01
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53 #define FLAG2_HINT_PENDING 0x02
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54 #define FLAG2_READ_PENDING 0x04
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55 #define FLAG2_SPRITE_COLLIDE 0x08
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56 #define FLAG2_REGION_PAL 0x10
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57 #define FLAG2_EVEN_FIELD 0x20
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58 #define FLAG2_BYTE_PENDING 0x40
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59
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60 #define DISPLAY_ENABLE 0x40
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61
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62 enum {
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63 REG_MODE_1=0,
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64 REG_MODE_2,
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65 REG_SCROLL_A,
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66 REG_WINDOW,
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67 REG_SCROLL_B,
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68 REG_SAT,
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69 REG_STILE_BASE,
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70 REG_BG_COLOR,
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71 REG_X_SCROLL,
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72 REG_Y_SCROLL,
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73 REG_HINT,
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74 REG_MODE_3,
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75 REG_MODE_4,
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76 REG_HSCROLL,
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77 REG_BGTILE_BASE,
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78 REG_AUTOINC,
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79 REG_SCROLL,
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80 REG_WINDOW_H,
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81 REG_WINDOW_V,
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82 REG_DMALEN_L,
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83 REG_DMALEN_H,
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84 REG_DMASRC_L,
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85 REG_DMASRC_M,
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86 REG_DMASRC_H
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87 } vdp_regs;
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88
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89 //Mode reg 1
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90 #define BIT_VSCRL_LOCK 0x80
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91 #define BIT_HSCRL_LOCK 0x40
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92 #define BIT_COL0_MASK 0x20
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93 #define BIT_HINT_EN 0x10
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94 #define BIT_SPRITE_8PX 0x08
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95 #define BIT_PAL_SEL 0x04
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96 #define BIT_MODE_4 BIT_PAL_SEL
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97 #define BIT_HVC_LATCH 0x02
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98 #define BIT_DISP_DIS 0x01
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99
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100 //Mode reg 2
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101 #define BIT_DISP_EN 0x40
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102 #define BIT_VINT_EN 0x20
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103 #define BIT_DMA_ENABLE 0x10
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104 #define BIT_PAL 0x08
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105 #define BIT_MODE_5 0x04
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106 #define BIT_SPRITE_SZ 0x02
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107
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108 //Mode reg 3
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109 #define BIT_EINT_EN 0x10
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110 #define BIT_VSCROLL 0x04
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111
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112 //Mode reg 4
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113 #define BIT_H40 0x01
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114 #define BIT_HILIGHT 0x8
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115 #define BIT_DOUBLE_RES 0x4
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116 #define BIT_INTERLACE 0x2
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117
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118 typedef struct {
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119 uint16_t address;
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120 int16_t x_pos;
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121 uint8_t pal_priority;
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122 uint8_t h_flip;
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123 } sprite_draw;
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124
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125 typedef struct {
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126 uint8_t size;
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127 uint8_t index;
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128 int16_t y;
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129 } sprite_info;
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130
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131 #define FIFO_SIZE 4
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132
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133 typedef struct {
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134 uint32_t cycle;
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135 uint16_t address;
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136 uint16_t value;
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137 uint8_t cd;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
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parents: 43
diff changeset
138 uint8_t partial;
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diff changeset
139 } fifo_entry;
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parents: 43
diff changeset
140
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
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parents: 43
diff changeset
141 typedef struct {
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
142 fifo_entry fifo[FIFO_SIZE];
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
143 int32_t fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
144 int32_t fifo_read;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
145 uint16_t address;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
146 uint8_t cd;
56
a28b1dfe1af2 Fix CRAM and possibly VSRAM writes
Mike Pavone <pavone@retrodev.com>
parents: 54
diff changeset
147 uint8_t flags;
138
aa3e1bb338c9 Fix VDP reads
Mike Pavone <pavone@retrodev.com>
parents: 137
diff changeset
148 uint8_t regs[VDP_REGS];
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
149 //cycle count in MCLKs
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parents:
diff changeset
150 uint32_t cycles;
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 710
diff changeset
151 uint32_t pending_vint_start;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 710
diff changeset
152 uint32_t pending_hint_start;
20
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parents:
diff changeset
153 uint8_t *vdpmem;
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parents:
diff changeset
154 //stores 2-bit palette + 4-bit palette index + priority for current sprite line
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parents:
diff changeset
155 uint8_t *linebuf;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1019
diff changeset
156 //pointer to current line in framebuffer
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1019
diff changeset
157 uint32_t *output;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
158 uint32_t *fb;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
159 system_header *system;
20
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parents:
diff changeset
160 uint16_t cram[CRAM_SIZE];
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
161 uint32_t colors[CRAM_SIZE*4];
437
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
162 uint32_t debugcolors[1 << (3 + 1 + 1 + 1)];//3 bits for source, 1 bit for priority, 1 bit for shadow, 1 bit for hilight
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
163 uint16_t vsram[VSRAM_SIZE];
710
4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Michael Pavone <pavone@retrodev.com>
parents: 697
diff changeset
164 uint16_t vscroll_latch[2];
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1019
diff changeset
165 uint32_t output_pitch;
697
7f96bd1cb1be Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents: 680
diff changeset
166 uint32_t frame;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 494
diff changeset
167 uint16_t vcounter;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
168 uint16_t inactive_start;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
169 uint16_t border_top;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
170 uint16_t border_bot;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
171 uint16_t hscroll_a;
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parents:
diff changeset
172 uint16_t hscroll_b;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
173 uint16_t h40_lines;
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
174 uint8_t hslot; //hcounter/2
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 494
diff changeset
175 uint8_t latched_mode;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
176 uint8_t sprite_index;
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parents:
diff changeset
177 uint8_t sprite_draws;
21
72ce60cb1711 Sprites somewhat less broken
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parents: 20
diff changeset
178 int8_t slot_counter;
72ce60cb1711 Sprites somewhat less broken
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parents: 20
diff changeset
179 int8_t cur_slot;
20
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parents:
diff changeset
180 sprite_draw sprite_draw_list[MAX_DRAWS];
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parents:
diff changeset
181 sprite_info sprite_info_list[MAX_SPRITES_LINE];
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 980
diff changeset
182 uint8_t sat_cache[SAT_CACHE_SIZE];
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
183 uint16_t col_1;
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parents:
diff changeset
184 uint16_t col_2;
480
0737953132ad Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents: 478
diff changeset
185 uint16_t hv_latch;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
186 uint16_t prefetch;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
187 uint8_t fetch_tmp[2];
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
188 uint8_t v_offset;
131
8fc8e46be691 Fix bug that was causing DMA fills to lock up under certain circumstances
Mike Pavone <pavone@retrodev.com>
parents: 75
diff changeset
189 uint8_t dma_cd;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
190 uint8_t hint_counter;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
191 uint8_t flags2;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
192 uint8_t double_res;
426
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
193 uint8_t b32;
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
194 uint8_t buf_a_off;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
195 uint8_t buf_b_off;
437
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
196 uint8_t debug;
722
8f5339961903 Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents: 717
diff changeset
197 uint8_t debug_pal;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
198 uint8_t pending_byte;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
199 uint8_t *tmp_buf_a;
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parents:
diff changeset
200 uint8_t *tmp_buf_b;
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parents:
diff changeset
201 } vdp_context;
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parents:
diff changeset
202
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
203 void init_vdp_context(vdp_context * context, uint8_t region_pal);
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 722
diff changeset
204 void vdp_free(vdp_context *context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
205 void vdp_run_context(vdp_context * context, uint32_t target_cycles);
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
206 //runs from current cycle count to VBLANK for the current mode, returns ending cycle count
f664eeb55cb4 Mostly broken VDP core and savestate viewer
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parents:
diff changeset
207 uint32_t vdp_run_to_vblank(vdp_context * context);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
208 //runs until the target cycle is reached or the current DMA operation has completed, whicever comes first
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
209 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles);
424
7e8e179116af Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
210 uint8_t vdp_load_gst(vdp_context * context, FILE * state_file);
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
211 uint8_t vdp_save_gst(vdp_context * context, FILE * outfile);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
212 int vdp_control_port_write(vdp_context * context, uint16_t value);
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
213 void vdp_control_port_write_pbc(vdp_context * context, uint8_t value);
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 138
diff changeset
214 int vdp_data_port_write(vdp_context * context, uint16_t value);
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
215 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value);
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
216 void vdp_test_port_write(vdp_context * context, uint16_t value);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
217 uint16_t vdp_control_port_read(vdp_context * context);
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
218 uint16_t vdp_data_port_read(vdp_context * context);
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1135
diff changeset
219 uint8_t vdp_data_port_read_pbc(vdp_context * context);
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1149
diff changeset
220 void vdp_latch_hv(vdp_context *context);
137
0e7e1ccc0a81 Implemented HV counter
Mike Pavone <pavone@retrodev.com>
parents: 131
diff changeset
221 uint16_t vdp_hv_counter_read(vdp_context * context);
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
222 uint16_t vdp_test_port_read(vdp_context * context);
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 56
diff changeset
223 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction);
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
224 uint32_t vdp_next_hint(vdp_context * context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 230
diff changeset
225 uint32_t vdp_next_vint(vdp_context * context);
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 327
diff changeset
226 uint32_t vdp_next_vint_z80(vdp_context * context);
953
08346262990b Remove the int number argument to vdp_int_ack since it is no longer used
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
227 void vdp_int_ack(vdp_context * context);
322
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
228 void vdp_print_sprite_table(vdp_context * context);
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 322
diff changeset
229 void vdp_print_reg_explain(vdp_context * context);
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
230 void latch_mode(vdp_context * context);
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
231 uint32_t vdp_cycles_to_frame_end(vdp_context * context);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
232 void write_cram(vdp_context * context, uint16_t address, uint16_t value);
1019
e34334e6c682 Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
Michael Pavone <pavone@retrodev.com>
parents: 998
diff changeset
233 void write_vram_byte(vdp_context *context, uint16_t address, uint8_t value);
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
234
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
235 #endif //VDP_H_