Mercurial > repos > blastem

annotate m68k_core.h @ 2155:6f58af5bd6fa

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Add ROM DB entry for NHL 96 as it is missing SRAM info in the header
author Michael Pavone <pavone@retrodev.com>
date Thu, 07 Apr 2022 00:49:58 -0700
parents 8554751f17b5
children 4e27c36f947c
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
2 Copyright 2013 Michael Pavone
539
c2716b502a81 Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents: 467
diff changeset
3 This file is part of BlastEm.
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 348
diff changeset
5 */
569
9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
6 #ifndef M68K_CORE_H_
9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
7 #define M68K_CORE_H_
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
8 #include <stdint.h>
197
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
9 #include <stdio.h>
557
acec5464fa1e Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
Mike Pavone <pavone@retrodev.com>
parents: 547
diff changeset
10 #include "backend.h"
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
11 #include "serialize.h"
208
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
12 //#include "68kinst.h"
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
13 struct m68kinst;
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
14
2034
8b2ef428d1aa Implement TMSS ROM and cart mapping register
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
15 #define NUM_MEM_AREAS 10
86
3d3966c254b2 RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents: 82
diff changeset
16 #define NATIVE_MAP_CHUNKS (64*1024)
987
1f09994e92c5 Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents: 985
diff changeset
17 #define NATIVE_CHUNK_SIZE ((16 * 1024 * 1024 / NATIVE_MAP_CHUNKS))
193
c66e4636f991 Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents: 192
diff changeset
18 #define MAX_NATIVE_SIZE 255
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
19
837
f2cd380adebe Implement TAS
Michael Pavone <pavone@retrodev.com>
parents: 776
diff changeset
20 #define M68K_OPT_BROKEN_READ_MODIFY 1
f2cd380adebe Implement TAS
Michael Pavone <pavone@retrodev.com>
parents: 776
diff changeset
21
1097
faa3a4617f62 Get Jaguar video interrupt working
Michael Pavone <pavone@retrodev.com>
parents: 1090
diff changeset
22 #define INT_PENDING_SR_CHANGE 254
faa3a4617f62 Get Jaguar video interrupt working
Michael Pavone <pavone@retrodev.com>
parents: 1090
diff changeset
23 #define INT_PENDING_NONE 255
996
784bc1e45e80 Fix 68K interrupt handling some more. Fatal Rewind is working again.
Michael Pavone <pavone@retrodev.com>
parents: 989
diff changeset
24
1303
208803173ebc Implemented M68K trace mode. Some edge cases/SR update paths still need work
Michael Pavone <pavone@retrodev.com>
parents: 1298
diff changeset
25 #define M68K_STATUS_TRACE 0x80
208803173ebc Implemented M68K trace mode. Some edge cases/SR update paths still need work
Michael Pavone <pavone@retrodev.com>
parents: 1298
diff changeset
26
540
4ca826862174 Generate m68k_start_context at runtime so it can use the generated load_context and save_context
Michael Pavone <pavone@retrodev.com>
parents: 539
diff changeset
27 typedef void (*start_fun)(uint8_t * addr, void * context);
2054
8ee7ecbf3f21 Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM
Michael Pavone <pavone@retrodev.com>
parents: 2034
diff changeset
28 typedef struct m68k_context m68k_context;
8ee7ecbf3f21 Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM
Michael Pavone <pavone@retrodev.com>
parents: 2034
diff changeset
29 typedef m68k_context *(*sync_fun)(m68k_context * context, uint32_t address);
540
4ca826862174 Generate m68k_start_context at runtime so it can use the generated load_context and save_context
Michael Pavone <pavone@retrodev.com>
parents: 539
diff changeset
30
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
31 typedef struct {
1298
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
32 code_ptr impl;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
33 uint16_t reglist;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
34 uint8_t reg_to_mem;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
35 uint8_t size;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
36 int8_t dir;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
37 } movem_fun;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
38
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
39 typedef struct {
558
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
40 cpu_options gen;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
41
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
42 int8_t dregs[8];
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
43 int8_t aregs[8];
539
c2716b502a81 Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents: 467
diff changeset
44 int8_t flag_regs[5];
197
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents: 193
diff changeset
45 FILE *address_log;
558
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
46 code_ptr read_16;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
47 code_ptr write_16;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
48 code_ptr read_8;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
49 code_ptr write_8;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
50 code_ptr read_32;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
51 code_ptr write_32_lowfirst;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
52 code_ptr write_32_highfirst;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
53 code_ptr do_sync;
1363
df6af7187b36 Fix to M68K interrupt latency for most instructions. Still needs some work for RAW_IMPL instructions besides move
Michael Pavone <pavone@retrodev.com>
parents: 1329
diff changeset
54 code_ptr handle_int_latch;
558
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
55 code_ptr trap;
540
4ca826862174 Generate m68k_start_context at runtime so it can use the generated load_context and save_context
Michael Pavone <pavone@retrodev.com>
parents: 539
diff changeset
56 start_fun start_context;
558
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
57 code_ptr retrans_stub;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
58 code_ptr native_addr;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
59 code_ptr native_addr_and_sync;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
60 code_ptr get_sr;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
61 code_ptr set_sr;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents: 557
diff changeset
62 code_ptr set_ccr;
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
63 code_ptr bp_stub;
2054
8ee7ecbf3f21 Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM
Michael Pavone <pavone@retrodev.com>
parents: 2034
diff changeset
64 sync_fun sync_components;
1298
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
65 code_info extra_code;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
66 movem_fun *big_movem;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
67 uint32_t num_movem;
d5a47597b61f Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents: 1228
diff changeset
68 uint32_t movem_storage;
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
69 code_word prologue_start;
569
9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
70 } m68k_options;
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
71
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
72 typedef void (*m68k_debug_handler)(m68k_context *context, uint32_t pc);
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
73
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
74 typedef struct {
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
75 m68k_debug_handler handler;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
76 uint32_t address;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
77 } m68k_breakpoint;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
78
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
79 struct m68k_context {
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
80 uint8_t flags[5];
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
81 uint8_t status;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
82 uint16_t int_ack;
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
83 uint32_t dregs[8];
73
8da611e69b32 Implement a couple of supervisor instructions
Mike Pavone <pavone@retrodev.com>
parents: 54
diff changeset
84 uint32_t aregs[9];
8da611e69b32 Implement a couple of supervisor instructions
Mike Pavone <pavone@retrodev.com>
parents: 54
diff changeset
85 uint32_t target_cycle; //cycle at which the next synchronization or interrupt occurs
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
86 uint32_t current_cycle;
73
8da611e69b32 Implement a couple of supervisor instructions
Mike Pavone <pavone@retrodev.com>
parents: 54
diff changeset
87 uint32_t sync_cycle;
82
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 73
diff changeset
88 uint32_t int_cycle;
6331ddec228f Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents: 73
diff changeset
89 uint32_t int_num;
981
902c53d9c16f Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
90 uint32_t last_prefetch_address;
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
91 uint16_t *mem_pointers[NUM_MEM_AREAS];
883
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 874
diff changeset
92 code_ptr resume_pc;
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 996
diff changeset
93 code_ptr reset_handler;
653
a18e3923481e Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 570
diff changeset
94 m68k_options *options;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents: 263
diff changeset
95 void *system;
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
96 m68k_breakpoint *breakpoints;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
97 uint32_t num_breakpoints;
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
98 uint32_t bp_storage;
846
98d7b6073163 Implement interrupt latency. Fixes Sesame Street: Counting Cafe and gives accurate results in my test ROM
Michael Pavone <pavone@retrodev.com>
parents: 837
diff changeset
99 uint8_t int_pending;
1303
208803173ebc Implemented M68K trace mode. Some edge cases/SR update paths still need work
Michael Pavone <pavone@retrodev.com>
parents: 1298
diff changeset
100 uint8_t trace_pending;
872
7022ba865cfd Initial work for allowing loading a ROM from menu
Michael Pavone <pavone@retrodev.com>
parents: 846
diff changeset
101 uint8_t should_return;
690
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents: 667
diff changeset
102 uint8_t ram_code_flags[];
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
103 };
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
104
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 996
diff changeset
105 typedef m68k_context *(*m68k_reset_handler)(m68k_context *context);
1329
85a90964b557 Fix interaction between 68K debugger and instruction retranslation due to self modifying code or bank switching
Michael Pavone <pavone@retrodev.com>
parents: 1303
diff changeset
106
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 996
diff changeset
107
567
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents: 566
diff changeset
108 void translate_m68k_stream(uint32_t address, m68k_context * context);
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
109 void start_68k_context(m68k_context * context, uint32_t address);
883
9f149f0e98b7 It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents: 874
diff changeset
110 void resume_68k(m68k_context *context);
2054
8ee7ecbf3f21 Implement enough of Sega CD gate array and Sub CPU to pass Sik's Mode 1 test ROM
Michael Pavone <pavone@retrodev.com>
parents: 2034
diff changeset
111 void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider, sync_fun sync_components);
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 996
diff changeset
112 m68k_context * init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
113 void m68k_reset(m68k_context * context);
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 883
diff changeset
114 void m68k_options_free(m68k_options *opts);
1111
2eb54e24914e Mostly working changes to allow support for multiple emulated system types in main blastem program
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
115 void insert_breakpoint(m68k_context * context, uint32_t address, m68k_debug_handler bp_handler);
184
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents: 155
diff changeset
116 void remove_breakpoint(m68k_context * context, uint32_t address);
208
3457dc6fd558 Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents: 198
diff changeset
117 m68k_context * m68k_handle_code_write(uint32_t address, m68k_context * context);
1130
8f14767661fa Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents: 1111
diff changeset
118 uint32_t get_instruction_start(m68k_options *opts, uint32_t address);
989
d70000fdff0b Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents: 987
diff changeset
119 uint16_t m68k_get_ir(m68k_context *context);
1082
2ec5e6eaf81d Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents: 996
diff changeset
120 void m68k_print_regs(m68k_context * context);
1228
2e6dcb5c11a2 WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents: 1130
diff changeset
121 void m68k_invalidate_code_range(m68k_context *context, uint32_t start, uint32_t end);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
122 void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1363
diff changeset
123 void m68k_deserialize(deserialize_buffer *buf, void *vcontext);
2133
8554751f17b5 Remove use of get_native_pointer in 68K instruction decoding in preparation for word RAM interleaving
Michael Pavone <pavone@retrodev.com>
parents: 2054
diff changeset
124 uint16_t m68k_instruction_fetch(uint32_t address, void *vcontext);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
125
569
9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents: 567
diff changeset
126 #endif //M68K_CORE_H_
198
209a37eed3e7 Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents: 197
diff changeset
127