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Initial implementation of video output hardware
author Michael Pavone <pavone@retrodev.com>
date Wed, 12 Oct 2016 09:39:52 -0700
parents c0a026e974f4
children a68274a25e2f
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 #include <stdint.h>
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2 #include <stdlib.h>
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3 #include <stdio.h>
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4 #include "jag_video.h"
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5 #include "render.h"
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6
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7 enum {
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8 VMODE_CRY,
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9 VMODE_RGB24,
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10 VMODE_DIRECT16,
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11 VMODE_RGB16,
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12 VMODE_VARIABLE
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13 };
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14
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15 #define BIT_TBGEN 1
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16
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17 char *vmode_names[] = {
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18 "CRY",
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19 "RGB24",
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20 "RGB16",
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21 "DIRECT16",
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22 "VARIABLE"
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23 };
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24
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25 static uint8_t cry_red[9][16] = {
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26 {0, 34, 68, 102, 135, 169, 203, 237, 255, 255, 255, 255, 255, 255, 255, 255},
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27 {0, 34, 68, 102, 135, 169, 203, 230, 247, 255, 255, 255, 255, 255, 255, 255},
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28 {0, 34, 68, 102, 135, 170, 183, 197, 214, 235, 255, 255, 255, 255, 255, 255},
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29 {0, 34, 68, 102, 130, 141, 153, 164, 181, 204, 227, 249, 255, 255, 255, 255},
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30 {0, 34, 68, 95, 104, 113, 122, 131, 148, 173, 198, 223, 248, 255, 255, 255},
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31 {0, 34, 64, 71, 78, 85, 91, 98, 115, 143, 170, 197, 224, 252, 255, 255},
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32 {0, 34, 43, 47, 52, 56, 61, 65, 82, 112, 141, 171, 200, 230, 255, 255},
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33 {0, 19, 21, 23, 26, 28, 30, 32, 49, 81, 113, 145, 177, 208, 240, 255},
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34 {0, 0, 0, 0, 0, 0, 0, 0, 17, 51, 85, 119, 153, 187, 221, 255}
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35 };
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36
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37 static uint8_t cry_green[16][8] = {
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38 {0, 0, 0, 0, 0, 0, 0, 0},
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39 {17, 19, 21, 23, 26, 28, 30, 32},
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40 {34, 38, 43, 47, 52, 56, 61, 65},
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41 {51, 57, 64, 71, 78, 85, 91, 98},
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42 {68, 77, 86, 95, 104, 113, 122, 131},
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43 {85, 96, 107, 119, 130, 141, 153, 164},
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44 {102, 115, 129, 142, 156, 170, 183, 197},
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45 {119, 134, 150, 166, 182, 198, 214, 230},
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46 {136, 154, 172, 190, 208, 226, 244, 255},
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47 {153, 173, 193, 214, 234, 255, 255, 255},
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48 {170, 192, 215, 238, 255, 255, 255, 255},
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49 {187, 211, 236, 255, 255, 255, 255, 255},
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50 {204, 231, 255, 255, 255, 255, 255, 255},
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51 {221, 250, 255, 255, 255, 255, 255, 255},
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52 {238, 255, 255, 255, 255, 255, 255, 255},
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53 {255, 255, 255, 255, 255, 255, 255, 255},
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54 };
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55
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56 static uint32_t table_cry[0x10000];
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57 static uint32_t table_rgb[0x10000];
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58 static uint32_t table_variable[0x10000];
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59
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60 static uint32_t cry_to_rgb(uint16_t cry)
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61 {
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62 uint32_t y = cry & 0xFF;
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63 if (y) {
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64 uint8_t c = cry >> 12;
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65 uint8_t r = cry >> 8 & 0xF;
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66
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67 uint32_t red = cry_red[c < 7 ? 0 : c - 7][r];
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68 uint32_t green = cry_green[c][r < 8 ? r : 15 - r];
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69 uint32_t blue = cry_red[c < 7 ? 0 : c - 7][15-r];
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70 red = red * 255 / y;
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71 blue = blue * 255 / y;
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72 green = green * 255 / y;
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73 return render_map_color(red, green, blue);
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74 } else {
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75 return render_map_color(0, 0, 0);
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76 }
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77 }
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78
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79 static uint32_t rgb16_to_rgb(uint16_t rgb)
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80 {
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81 return render_map_color(
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82 rgb >> 8 & 0xF8,
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83 rgb << 2 & 0xFC,
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84 rgb >> 4 & 0xF8
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85 );
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86 }
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87
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88 jag_video *jag_video_init(void)
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89 {
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90 static uint8_t table_init_done = 0;
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91 if (!table_init_done) {
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92 for (int i = 0; i < 0x10000; i++)
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93 {
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94 table_cry[i] = cry_to_rgb(i);
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95 table_rgb[i] = rgb16_to_rgb(i);
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96 table_variable[i] = i & 1 ? rgb16_to_rgb(i & 0xFFFE) : cry_to_rgb(i);
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97 }
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98 table_init_done = 1;
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99 }
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100 return calloc(1, sizeof(jag_video));
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101 }
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102
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103 static void copy_16(uint32_t *dst, uint32_t len, uint16_t *linebuffer, uint32_t *table)
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104 {
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105 for (; len; len--, dst++, linebuffer++)
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106 {
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107 *dst = table[*linebuffer];
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108 }
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109 }
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110
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111 static void copy_linebuffer(jag_video *context, uint16_t *linebuffer)
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112 {
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113 if (!context->output) {
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114 return;
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115 }
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116 uint32_t *dst = context->output;
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117 uint32_t len;
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118 if (context->regs[VID_HCOUNT] == context->regs[VID_HDISP_BEGIN1]) {
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119 if (
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120 context->regs[VID_HDISP_BEGIN2] == context->regs[VID_HDISP_BEGIN1]
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121 || context->regs[VID_HDISP_BEGIN2] > (context->regs[VID_HPERIOD] | 0x400)
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122 ) {
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123 //only one line buffer per line, so copy the previous line in its entirety
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124 len = context->regs[VID_HDISP_END] - 0x400 + context->regs[VID_HPERIOD] - context->regs[VID_HDISP_BEGIN1] + 2;
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125 } else {
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126 //copy the second half of the previous line
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127 if (context->regs[VID_HDISP_BEGIN2] & 0x400) {
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128 //BEGIN2 is after the HCOUNT jump
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129 dst += context->regs[VID_HPERIOD] - context->regs[VID_HDISP_BEGIN1]
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130 + context->regs[VID_HDISP_BEGIN2] - 0x400 + 1;
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131 len = context->regs[VID_HDISP_END] - context->regs[VID_HDISP_BEGIN2] + 1;
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132 } else {
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133 //BEGIN2 is before the HCOUNT jump
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134 dst += context->regs[VID_HDISP_BEGIN2] - context->regs[VID_HDISP_BEGIN1];
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135 len = context->regs[VID_HDISP_END] + context->regs[VID_HPERIOD] - context->regs[VID_HDISP_BEGIN2] + 2;
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136 }
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137 }
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138 context->output += context->output_pitch / sizeof(uint32_t);
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139 } else {
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140 //copy the first half of the current line
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141 if (context->regs[VID_HDISP_BEGIN2] & 0x400) {
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Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
142 //BEGIN2 is after the HCOUNT jump
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
143 len = context->regs[VID_HDISP_BEGIN2] - 0x400 + context->regs[VID_HPERIOD] - context->regs[VID_HDISP_BEGIN1] + 1;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
144 } else {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
145 //BEGIN2 is before the HCOUNT jump
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
146 len = context->regs[VID_HDISP_BEGIN2] - context->regs[VID_HDISP_BEGIN1];
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
147 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
148 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
149 len /= context->pclock_div;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
150 switch (context->mode)
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
151 {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
152 case VMODE_CRY:
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
153 copy_16(dst, len, linebuffer, table_cry);
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
154 break;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
155 case VMODE_RGB24:
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
156 //TODO: Implement me
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
157 break;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
158 case VMODE_DIRECT16:
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
159 //TODO: Implement this once I better understand what would happen on hardware with composite output
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
160 break;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
161 case VMODE_RGB16:
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
162 copy_16(dst, len, linebuffer, table_rgb);
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
163 break;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
164 case VMODE_VARIABLE:
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
165 copy_16(dst, len, linebuffer, table_variable);
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
166 break;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
167 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
168 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
169
1087
6433d4d05934 Added placeholder code for video output hardware/object processor
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
170 void jag_video_run(jag_video *context, uint32_t target_cycle)
6433d4d05934 Added placeholder code for video output hardware/object processor
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
171 {
1089
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
172 if (context->regs[VID_VMODE] & BIT_TBGEN) {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
173 while (context->cycles < target_cycle)
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
174 {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
175 //TODO: Optimize this to not actually increment one step at a time
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
176 if (
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
177 (
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
178 context->regs[VID_HCOUNT] == context->regs[VID_HDISP_BEGIN1]
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
179 || context->regs[VID_HCOUNT] == context->regs[VID_HDISP_BEGIN2]
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
180 )
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
181 && context->regs[VID_VCOUNT] >= context->regs[VID_VDISP_BEGIN]
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
182 && context->regs[VID_VCOUNT] < context->regs[VID_VDISP_END]
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
183 ) {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
184 //swap linebuffers, render linebuffer to framebuffer and kick off object processor
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
185 if (context->write_line_buffer == context->line_buffer_a) {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
186 context->write_line_buffer = context->line_buffer_b;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
187 copy_linebuffer(context, context->line_buffer_a);
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
188 } else {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
189 context->write_line_buffer = context->line_buffer_a;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
190 copy_linebuffer(context, context->line_buffer_b);
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
191 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
192 //clear new write line buffer with background color
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
193 for (int i = 0; i < LINEBUFFER_WORDS; i++)
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
194 {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
195 context->write_line_buffer[i] = context->regs[VID_BGCOLOR];
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
196 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
197
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
198 //TODO: kick off object processor
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
199 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
200
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
201 if (
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
202 !context->output
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
203 && context->regs[VID_VCOUNT] == context->regs[VID_VDISP_BEGIN]
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
204 && context->regs[VID_HCOUNT] == context->regs[VID_HDISP_BEGIN1]
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
205 ) {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
206 context->output = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch);
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
207 } else if (context->output && context->regs[VID_VCOUNT] >= context->regs[VID_VDISP_END]) {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
208 int width = (context->regs[VID_HPERIOD] - context->regs[VID_HDISP_BEGIN1]
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
209 + context->regs[VID_HDISP_END] - 1024 + 2) / context->pclock_div;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
210 render_framebuffer_updated(FRAMEBUFFER_ODD, width);
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
211 context->output = NULL;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
212 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
213
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
214 if ((context->regs[VID_HCOUNT] & 0x3FF) == context->regs[VID_HPERIOD]) {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
215 //reset bottom 10 bits to zero, flip the 11th bit which represents which half of the line we're on
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
216 context->regs[VID_HCOUNT] = (context->regs[VID_HCOUNT] & 0x400) ^ 0x400;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
217 //increment half-line counter
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
218 if (context->regs[VID_VCOUNT] == context->regs[VID_VPERIOD]) {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
219 context->regs[VID_VCOUNT] = 0;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
220 } else {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
221 context->regs[VID_VCOUNT]++;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
222 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
223 } else {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
224 context->regs[VID_HCOUNT]++;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
225 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
226 context->cycles++;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
227 }
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
228 } else {
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
229 context->cycles = target_cycle;
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
230 }
1087
6433d4d05934 Added placeholder code for video output hardware/object processor
Michael Pavone <pavone@retrodev.com>
parents:
diff changeset
231 }
1088
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
232
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
233 static uint8_t is_reg_writeable(uint32_t address)
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
234 {
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
235 return address < VID_HLPEN || address >= VID_OBJLIST1;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
236 }
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
237
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
238 void jag_video_reg_write(jag_video *context, uint32_t address, uint16_t value)
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
239 {
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
240 uint32_t reg = (address >> 1 & 0x7F) - 2;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
241 if (reg < JAG_VIDEO_REGS && is_reg_writeable(reg)) {
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
242 context->regs[reg] = value;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
243 if (reg == VID_VMODE) {
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
244 context->pclock_div = (value >> 9 & 7) + 1;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
245 context->pclock_counter = 0;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
246 if (value & 0x10) {
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
247 context->mode = VMODE_VARIABLE;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
248 } else {
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
249 context->mode = value >> 1 & 3;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
250 }
1089
87597a048d38 Initial implementation of video output hardware
Michael Pavone <pavone@retrodev.com>
parents: 1088
diff changeset
251 printf("Mode %s, pixel clock divider: %d, time base generation: %s\n", vmode_names[context->mode], context->pclock_div, value & BIT_TBGEN ? "enabled" : "disabled");
1088
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
252 }
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
253 switch (reg)
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
254 {
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
255 case VID_OBJLIST1:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
256 printf("Object List Pointer 1: %X\n", value);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
257 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
258 case VID_OBJLIST2:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
259 printf("Object List Pointer 2: %X\n", value);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
260 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
261 case VID_HPERIOD:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
262 printf("Horizontal period: %d\n", value & 0x3FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
263 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
264 case VID_HBLANK_BEGIN:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
265 printf("horizontal blanking begin: %d\n", value & 0x7FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
266 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
267 case VID_HBLANK_END:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
268 printf("horizontal blanking end: %d\n", value & 0x7FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
269 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
270 case VID_HSYNC:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
271 printf("horizontal sync start: %d\n", value & 0x7FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
272 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
273 case VID_HDISP_BEGIN1:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
274 printf("horizontal display begin 1: %d\n", value & 0x7FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
275 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
276 case VID_HDISP_BEGIN2:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
277 printf("horizontal display begin 2: %d\n", value & 0x7FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
278 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
279 case VID_HDISP_END:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
280 printf("horizontal display end: %d\n", value & 0x7FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
281 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
282 case VID_VPERIOD:
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
283 printf("Vertical period: %d\n", value & 0x7FF);
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
284 break;
c0a026e974f4 Basic handling of video/object processor register writes
Michael Pavone <pavone@retrodev.com>
parents: 1087
diff changeset
285 case VID_VBLANK_BEGIN:
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286 printf("vertical blanking begin: %d\n", value & 0x7FF);
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287 break;
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288 case VID_VBLANK_END:
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289 printf("vertical blanking end: %d\n", value & 0x7FF);
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290 break;
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291 case VID_VSYNC:
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292 printf("vertical sync start: %d\n", value & 0x7FF);
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293 break;
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294 case VID_VDISP_BEGIN:
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295 printf("vertical display begin: %d\n", value & 0x7FF);
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296 break;
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297 case VID_VDISP_END:
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298 printf("vertical display end: %d\n", value & 0x7FF);
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299 break;
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300 }
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301 } else {
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302 fprintf(stderr, "Write to invalid video/object processor register %X:%X\n", address, value);
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303 }
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304 }