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annotate segacd.c @ 1504:95b3a1a8b26c segacd

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Add mapping for gate array registers in main cpu map
author Michael Pavone <pavone@retrodev.com>
date Tue, 19 Dec 2017 00:49:13 -0800
parents a763523dadf4
children 8ee7ecbf3f21
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1 #include <stdlib.h>
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2 #include <string.h>
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3 #include "segacd.h"
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4 #include "genesis.h"
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5 #include "util.h"
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6
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7 static void *prog_ram_wp_write16(uint32_t address, void *vcontext, uint16_t value)
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8 {
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9 return vcontext;
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10 }
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11
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12 static void *prog_ram_wp_write8(uint32_t address, void *vcontext, uint8_t value)
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13 {
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14 return vcontext;
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15 }
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16
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17 static uint16_t work_ram_2M_read16(uint32_t address, void *vcontext)
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18 {
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19 return 0;
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20 }
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21
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22 static uint8_t work_ram_2M_read8(uint32_t address, void *vcontext)
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23 {
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24 return 0;
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25 }
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26
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27 static void *work_ram_2M_write16(uint32_t address, void *vcontext, uint16_t value)
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28 {
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29 return vcontext;
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30 }
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31
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32 static void *work_ram_2M_write8(uint32_t address, void *vcontext, uint8_t value)
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33 {
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34 return vcontext;
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35 }
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36
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37 static uint16_t work_ram_1M_read16(uint32_t address, void *vcontext)
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38 {
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39 return 0;
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40 }
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41
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42 static uint8_t work_ram_1M_read8(uint32_t address, void *vcontext)
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43 {
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44 return 0;
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45 }
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46
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47 static void *work_ram_1M_write16(uint32_t address, void *vcontext, uint16_t value)
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48 {
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49 return vcontext;
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50 }
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51
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52 static void *work_ram_1M_write8(uint32_t address, void *vcontext, uint8_t value)
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53 {
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54 return vcontext;
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55 }
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56
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57 static uint8_t pcm_read8(uint32_t address, void *vcontext)
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58 {
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59 return 0;
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60 }
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61
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62 static uint16_t pcm_read16(uint32_t address, void *vcontext)
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63 {
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64 return 0xFF00 | pcm_read8(address+1, vcontext);
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65 }
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66
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67 static void *pcm_write8(uint32_t address, void *vcontext, uint8_t value)
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68 {
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69 return vcontext;
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70 }
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71
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72 static void *pcm_write16(uint32_t address, void *vcontext, uint16_t value)
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73 {
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74 return pcm_write8(address+1, vcontext, value);
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75 }
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76
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77 static uint16_t sub_gate_read16(uint32_t address, void *vcontext)
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78 {
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79 m68k_context *m68k = vcontext;
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80 segacd_context *cd = m68k->system;
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81 return cd->gate_array[(address & 0x1FF) >> 1];
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82 }
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83
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84 static uint8_t sub_gate_read8(uint32_t address, void *vcontext)
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85 {
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86 m68k_context *m68k = vcontext;
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87 segacd_context *cd = m68k->system;
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88 uint16_t val = cd->gate_array[(address & 0x1FF) >> 1];
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89 return address & 1 ? val : val >> 8;
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90 }
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91
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92 static void *sub_gate_write16(uint32_t address, void *vcontext, uint16_t value)
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93 {
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94 m68k_context *m68k = vcontext;
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95 segacd_context *cd = m68k->system;
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96 uint32_t reg = (address & 0x1FF) >> 1;
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97 switch (reg)
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98 {
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99 case 0x7:
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100 cd->gate_array[reg] &= 0xFF00;
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101 cd->gate_array[reg] |= value & 0xFF;
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102 break;
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103 case 0x10:
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104 case 0x11:
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105 case 0x12:
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106 case 0x13:
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107 case 0x14:
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108 case 0x15:
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109 case 0x16:
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110 case 0x17:
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111 //no effects for these other than saving the value
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112 cd->gate_array[reg] = value;
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113 break;
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114 default:
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115 printf("Unhandled gate array write %X:%X\n", address, value);
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116 }
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117 return vcontext;
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118 }
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119
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120 static void *sub_gate_write8(uint32_t address, void *vcontext, uint8_t value)
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121 {
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122 m68k_context *m68k = vcontext;
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123 segacd_context *cd = m68k->system;
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124 uint32_t reg = (address & 0x1FF) >> 1;
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125 uint16_t value16;
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126 if (address & 1) {
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127 value16 = cd->gate_array[reg] & 0xFF00 | value;
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128 } else {
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129 value16 = cd->gate_array[reg] & 0xFF | (value << 8);
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130 }
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131 return sub_gate_write16(address, vcontext, value16);
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132 }
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133
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134 static uint16_t main_gate_read16(uint32_t address, void *vcontext)
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135 {
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136 m68k_context *m68k = vcontext;
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137 segacd_context *cd = m68k->system;
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138 return cd->gate_array[(address & 0x1FF) >> 1];
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139 }
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140
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141 static uint8_t main_gate_read8(uint32_t address, void *vcontext)
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142 {
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143 m68k_context *m68k = vcontext;
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144 segacd_context *cd = m68k->system;
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145 uint16_t val = cd->gate_array[(address & 0x1FF) >> 1];
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146 return address & 1 ? val : val >> 8;
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147 }
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148
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149 static void *main_gate_write16(uint32_t address, void *vcontext, uint16_t value)
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150 {
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151 m68k_context *m68k = vcontext;
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152 genesis_context *gen = m68k->system;
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153 segacd_context *cd = gen->expansion;
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154 uint32_t reg = (address & 0x1FF) >> 1;
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155 switch (reg)
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156 {
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157 case 0x7:
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158 cd->gate_array[reg] &= 0xFF;
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159 cd->gate_array[reg] |= value & 0xFF00;
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160 break;
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161 case 0x8:
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162 case 0x9:
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163 case 0xA:
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164 case 0xB:
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165 case 0xC:
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166 case 0xD:
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167 case 0xE:
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168 case 0xF:
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169 //no effects for these other than saving the value
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170 cd->gate_array[reg] = value;
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171 break;
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172 default:
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173 printf("Unhandled gate array write %X:%X\n", address, value);
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174 }
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175 return vcontext;
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176 }
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177
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178 static void *main_gate_write8(uint32_t address, void *vcontext, uint8_t value)
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179 {
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180 m68k_context *m68k = vcontext;
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181 genesis_context *gen = m68k->system;
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182 segacd_context *cd = gen->expansion;
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183 uint32_t reg = (address & 0x1FF) >> 1;
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184 uint16_t value16;
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185 if (address & 1) {
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186 value16 = cd->gate_array[reg] & 0xFF00 | value;
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187 } else {
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188 value16 = cd->gate_array[reg] & 0xFF | (value << 8);
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189 }
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190 return main_gate_write16(address, vcontext, value16);
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191 }
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192
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193 segacd_context *alloc_configure_segacd(system_media *media, uint32_t opts, uint8_t force_region, rom_info *info)
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194 {
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195 static memmap_chunk sub_cpu_map[] = {
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196 {0x000000, 0x00FEFF, 0x0000, .flags=MMAP_READ | MMAP_CODE, .write_16 = prog_ram_wp_write16, .write_8 = prog_ram_wp_write8},
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197 {0x00FF00, 0x07FFFF, 0x0000, .flags=MMAP_READ | MMAP_WRITE | MMAP_CODE},
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198 {0x080000, 0x0BFFFF, 0x0000, .flags=MMAP_READ | MMAP_WRITE | MMAP_CODE | MMAP_PTR_IDX | MMAP_FUNC_NULL, .ptr_index = 0,
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199 .read_16 = work_ram_2M_read16, .write_16 = work_ram_2M_write16, .read_8 = work_ram_2M_read8, .write_8 = work_ram_2M_write8},
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200 {0x0C0000, 0x0DFFFF, 0x0000, .flags=MMAP_READ | MMAP_WRITE | MMAP_CODE | MMAP_PTR_IDX | MMAP_FUNC_NULL, .ptr_index = 1,
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201 .read_16 = work_ram_1M_read16, .write_16 = work_ram_1M_write16, .read_8 = work_ram_1M_read8, .write_8 = work_ram_1M_write8},
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202 {0xFE0000, 0xFEFFFF, 0x3FFF, .flags=MMAP_READ | MMAP_WRITE | MMAP_ONLY_ODD},
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203 {0xFF0000, 0xFF7FFF, 0x0000, .read_16 = pcm_read16, .write_16 = pcm_write16, .read_8 = pcm_read8, .write_8 = pcm_write8},
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204 {0xFF8000, 0xFF81FF, 0x0000, .read_16 = sub_gate_read16, .write_16 = sub_gate_write16, .read_8 = sub_gate_read8, .write_8 = sub_gate_write8}
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205 };
1503
a763523dadf4 Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded
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206 memset(info, 0, sizeof(*info));
1502
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207 segacd_context *cd = calloc(sizeof(segacd_context), 1);
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208 FILE *f = fopen("cdbios.bin", "rb");
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209 if (!f) {
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210 fatal_error("Failed to open CD firmware for reading");
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211 }
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212 long firmware_size = file_size(f);
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213 uint32_t adjusted_size = nearest_pow2(firmware_size);
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214 cd->rom = malloc(adjusted_size);
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215 if (firmware_size != fread(cd->rom, 1, firmware_size, f)) {
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216 fatal_error("Failed to read CD firmware");
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217 }
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218 cd->rom_mut = malloc(adjusted_size);
1503
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diff changeset
219 byteswap_rom(adjusted_size, cd->rom);
1502
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220 memcpy(cd->rom_mut, cd->rom, adjusted_size);
1503
a763523dadf4 Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded
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diff changeset
221
a763523dadf4 Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded
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diff changeset
222 tern_node *db = get_rom_db();
a763523dadf4 Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded
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diff changeset
223 *info = configure_rom(db, media->buffer, media->size, media->chain ? media->chain->buffer : NULL, media->chain ? media->chain->size : 0, NULL, 0);
a763523dadf4 Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded
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diff changeset
224
1502
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
225 cd->prog_ram = malloc(512*1024);
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diff changeset
226 cd->work_ram = malloc(256*1024);
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diff changeset
227 cd->pcm_ram = malloc(64*1024);
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228 //TODO: Load state from file
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diff changeset
229 cd->bram = malloc(8*1024);
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
230
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
231 sub_cpu_map[0].buffer = sub_cpu_map[1].buffer = cd->prog_ram;
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diff changeset
232 sub_cpu_map[4].buffer = cd->bram;
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diff changeset
233 m68k_options *mopts = malloc(sizeof(m68k_options));
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diff changeset
234 init_m68k_opts(mopts, sub_cpu_map, sizeof(sub_cpu_map) / sizeof(*sub_cpu_map), 4);
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
235 cd->m68k = init_68k_context(mopts, NULL);
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
236 cd->m68k->system = cd;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
237 cd->busreq = 1;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
238 cd->busack = 1;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
239
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
240 return cd;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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241 }
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
242
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
243 memmap_chunk *segacd_main_cpu_map(segacd_context *cd, uint32_t *num_chunks)
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
244 {
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diff changeset
245 static memmap_chunk main_cpu_map[] = {
1503
a763523dadf4 Added code for initializing a combined Genesis + Sega CD system when a Sega CD ISO is loaded
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parents: 1502
diff changeset
246 {0x000000, 0x01FFFF, 0xFFFFFF, .flags=MMAP_READ},
1502
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diff changeset
247 {0x020000, 0x03FFFF, 0x1FFFF, .flags=MMAP_READ|MMAP_WRITE|MMAP_PTR_IDX|MMAP_FUNC_NULL, .ptr_index = 0},//TODO: support running main CPU code from here
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diff changeset
248 {0x040000, 0x05FFFF, 0x1FFFF, .flags=MMAP_READ}, //first ROM alias
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diff changeset
249 //TODO: additional ROM/prog RAM aliases
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diff changeset
250 {0x200000, 0x01FFFF, 0x1FFFF, .flags=MMAP_READ|MMAP_WRITE|MMAP_PTR_IDX|MMAP_FUNC_NULL, .ptr_index = 1},
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
251 {0x220000, 0x03FFFF, 0x1FFFF, .flags=MMAP_READ|MMAP_WRITE|MMAP_PTR_IDX|MMAP_FUNC_NULL, .ptr_index = 2},
1504
95b3a1a8b26c Add mapping for gate array registers in main cpu map
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parents: 1503
diff changeset
252 {0xA12000, 0xA12FFF, 0xFFFFFF, .read_16 = main_gate_read16, .write_16 = main_gate_write16, .read_8 = main_gate_read8, .write_8 = main_gate_write8}
1502
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diff changeset
253 };
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diff changeset
254 //TODO: support cart boot maps
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
255 //TODO: support BRAM cart
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diff changeset
256 main_cpu_map[0].buffer = cd->rom_mut;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
257 main_cpu_map[2].buffer = cd->rom;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
258 main_cpu_map[1].buffer = cd->prog_ram;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
259 main_cpu_map[3].buffer = cd->work_ram;
2564b6ba2e12 Initial skeleton of Sega CD memory handlers
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diff changeset
260 main_cpu_map[3].buffer = cd->work_ram + 0x10000;
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diff changeset
261 *num_chunks = sizeof(main_cpu_map) / sizeof(*main_cpu_map);
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diff changeset
262 return main_cpu_map;
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diff changeset
263 }