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2705
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1 #"Minimum instruction cycle is 333 ns for internal ROM 500 ns for external at 12 MHz"
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2 #That's 4 clks for internal ROM, 6 clocks external
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3 #Above seems to be defined based on external clock input, but there's an internal divider
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4 #Instruction timing tables seem to specified in terms of this divided clock
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5 info
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6 prefix upd78k2_
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7 opcode_size 8
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8 header upd78k2.h
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9 body upd78k2_run_op
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10 extra_tables sfr bit1 bit2 muldiv base sfrbit spmov indexed regind alt_base alt_indexed alt_regind mov_reg
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11 include upd78k2_util.c
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12 regs
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13 main 8 x a c b e d l h
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14 psw 8
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15 pc 16
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16 sp 16
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17 rbs 8
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18 int_enable 8
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19 int_priority_flag 8
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20 chflags 8
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21 zflag 8
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22 scratch1 32
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23 scratch2 32
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24 mem_pointers ptr8 4
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25 port_data 8 8
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26 port_mode 8 8
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27 mm 8
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28 iram 8 256
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29 flags
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30 register psw
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31 I 7 none int_enable
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32 Z 6 zero zflag
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33 R 5 none rbs.1
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34 A 4 half-carry chflags.3
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35 B 3 none rbs.0
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36 P 1 none int_priority_flag
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37 C 0 carry chflags.7
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38 declare
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39 uint8_t upd78237_sfr_read(uint32_t address, void *context);
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40 void *upd78237_sfr_write(uint32_t address, void *context, uint8_t value);
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41 void init_upd78k2_opts(upd78k2_options *opts, memmap_chunk const *chunks, uint32_t num_chunks);
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42 upd78k2_context *init_upd78k2_context(upd78k2_options *opts);
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43
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44 #Prefix bytes
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45 # 0000 0001 -> saddr becomes sfr, mem becomes &mem
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46 # 0000 0010 -> bit instructions/ conditional branches
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47 # 0000 0011 -> more bit instructions / conditional branches
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48 # 0000 0110 -> base mode
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49 # 0000 1000 -> saddr/sfr bit instructions / conditional branches
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50 # 0000 1001 -> mov !addr16/stbc
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51 # 0000 1010 -> indexed mode
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52 # 0001 0110 -> register indirect
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53
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54 sfr_read
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55 arg offset 8
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56 scratch1 = offset + 0xFF00
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57 ocall read_8
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58
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59 sfr_write
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60 arg offset 8
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61 arg value 8
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62 scratch2 = offset + 0xFF00
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63 scratch1 = value
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64 ocall write_8
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65
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66 iram_read
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67 arg offset 8
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68 local normal_iram 8
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69 normal_iram = 1
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70 if offset >=U 0xE0
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71 #register bank area
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72 switch rbs
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73 case 0
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74 if offset >=U 0xF8
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75 normal_iram = 0
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76 end
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77 case 1
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78 if offset >=U 0xF0
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79 if offset >=U 0xF8
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80 else
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81 normal_iram = 0
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82 end
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83 end
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84 case 2
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85 if offset >=U 0xE8
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86 if offset >=U 0xF0
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87 else
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88 normal_iram = 0
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89 end
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90 end
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91 case 3
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92 if offset >=U 0xE8
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93 else
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94 normal_iram = 0
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95 end
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96 end
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97 end
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98 if normal_iram
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99 scratch1 = iram.offset
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100 else
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101 scratch1 = offset & 7
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102 scratch1 = main.scratch1
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103 end
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104
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105 iram_write
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106 arg offset 8
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107 arg value 8
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108 local normal_iram 8
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109 local regnum 8
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110 normal_iram = 1
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111 if offset >=U 0xE0
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112 #register bank area
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113 switch rbs
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114 case 0
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115 if offset >=U 0xF8
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116 normal_iram = 0
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117 end
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118 case 1
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119 if offset >=U 0xF0
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120 if offset >=U 0xF8
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121 else
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122 normal_iram = 0
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123 end
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124 end
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125 case 2
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126 if offset >=U 0xE8
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127 if offset >=U 0xF0
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128 else
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129 normal_iram = 0
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130 end
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131 end
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132 case 3
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133 if offset >=U 0xE8
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134 else
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135 normal_iram = 0
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136 end
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137 end
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138 if normal_iram
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139 iram.offset = value
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140 else
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141 regnum = offset & 8
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142 main.regnum = value
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143 end
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144
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145 mem_read_no_exp
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146 arg addr 32
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147 local offset 8
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148 if addr >=U 0xFE00
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149 if addr >=U 0xFF00
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150 offset = addr
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151 sfr_read offset
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152 else
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153 offset = addr
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154 iram_read offset
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155 end
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156 else
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157 scratch1 = addr
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158 ocall read_8
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159 end
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160
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161 mem_write_no_exp
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162 arg addr 32
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163 arg value 8
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164 local offset 8
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165 if addr >=U 0xFE00
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166 if addr >=U 0xFF00
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167 offset = addr
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168 sfr_write offset value
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169 else
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170 offset = addr
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171 iram_write offset value
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172 end
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173 else
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174 scratch2 = addr
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175 scratch1 = value
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176 ocall write_8
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177 end
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178
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179 upd78k2_op_fetch
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180 mem_read_no_exp pc
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181 pc += 1
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182
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183 upd78k2_op_fetch_word
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184 local tmp 8
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185 upd78k2_op_fetch
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186 tmp = scratch1
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187 upd78k2_op_fetch
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188 scratch1 <<= 8
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189 scratch1 |= tmp
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190
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191 upd78k2_run_op
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192 upd78k2_op_fetch
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193 dispatch scratch1
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194
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195 saddr_read
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196 arg offset 8
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197 local tmp 8
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198 if offset >=U 0xE0
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199 #sfr area
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200 tmp = offset - 0xE0
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201 sfr_read tmp
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202 else
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203 tmp = offset + 0x20
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204 iram_read tmp
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205 end
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206
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207 saddr_write
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208 arg offset 8
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209 arg value 8
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210 local tmp 8
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211 if offset >=U 0xE0
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212 #sfr area
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213 tmp = offset - 0xE0
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214 sfr_write tmp value
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215 else
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216 tmp = offset + 0x20
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217 iram_write tmp value
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218 end
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219
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220 mem_read
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221 arg address 16
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222 arg alt_bank 8
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223 local full_address 32
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224 local meg_enable 8
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225 meg_enable = mm & 0x40
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226 if meg_enable
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227 if alt_bank
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228 full_address = port_data.6 & 0xF
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229 else
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230 full_address = port_mode.6 & 0xF
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231 end
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232 full_address <<= 16
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233 full_address |= address
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234 else
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235 full_address = address
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236 end
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237 mem_read_no_exp full_address
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238
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239 mem_write
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240 arg address 16
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241 arg value 8
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242 arg alt_bank 8
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243 local full_address 32
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244 local meg_enable 8
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245 meg_enable = mm & 0x40
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246 if meg_enable
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247 if alt_bank
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248 full_address = port_data.6 & 0xF
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249 else
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250 full_address = port_mode.6 & 0xF
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251 end
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252 full_address <<= 16
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253 full_address |= address
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254 else
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255 full_address = address
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256 end
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257 mem_write_no_exp full_address value
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258
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259 push_word
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260 arg value 16
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261 local tmp 8
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262 tmp = value >> 8
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263 sp -= 1
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264 mem_write_no_exp sp tmp
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265 tmp = value
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266 sp -= 1
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267 mem_write_no_exp sp tmp
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268
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269 pop_word
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270 mem_read_no_exp sp
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271 dst = scratch1
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272 sp += 1
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273 mem_read_no_exp sp
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274 scratch1 <<= 8
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275 dst |= scratch1
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276 sp += 1
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277
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278 00000000 nop
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279 cycles 2 #minimum cycle time appears to be 4 (ignoring internal divider)
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280
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281 00000001 sfr_prefix
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282 upd78k2_op_fetch
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283 dispatch scratch1 sfr
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284
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285 00000010 bit1_prefix
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286 upd78k2_op_fetch
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287 dispatch scratch1 bit1
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288
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289 00000011 bit2_prefix
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290 upd78k2_op_fetch
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291 dispatch scratch1 bit2
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292
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293 00000101 muldiv_prefix
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294 upd78k2_op_fetch
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295 dispatch scratch1 muldiv
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296
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297 00000110 base_prefix
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298 upd78k2_op_fetch
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299 dispatch scratch1 base
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300
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301 00001000 sfrbit_prefix
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302 upd78k2_op_fetch
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303 dispatch scratch1 sfrbit
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304
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305 00001001 spmov_prefix
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306 upd78k2_op_fetch
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307 dispatch scratch1 spmov
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308
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309 00001010 indexed_prefix
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310 upd78k2_op_fetch
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311 dispatch scratch1 indexed
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312
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313 00010110 regind_prefix
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314 upd78k2_op_fetch
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315 dispatch scratch1 regind
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316
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317 00100100 mov_reg_prefix
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318 upd78k2_op_fetch
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319 dispatch scratch1 mov_reg
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320
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321 sfr 00000110 alt_base_prefix
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322 upd78k2_op_fetch
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323 dispatch scratch1 alt_base
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324
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325 sfr 00001010 alt_indexed_prefix
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326 upd78k2_op_fetch
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327 dispatch scratch1 alt_indexed
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328
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329 sfr 00010110 alt_regind_prefix
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330 upd78k2_op_fetch
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331 dispatch scratch1 alt_regind
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332
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333 aluop
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334 arg op 8
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335 arg src 8
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336 switch op
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337 case 0
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338 dst += src
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339 update_flags ZAC
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340 case 1
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341 adc dst src dst
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342 update_flags ZAC
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343 case 2
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344 dst -= src
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345 update_flags ZAC
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346 case 3
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347 sbc dst src dst
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348 update_flags ZAC
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349 case 4
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350 dst &= src
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351 update_flags Z
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352 case 5
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353 dst ^= src
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354 update_flags Z
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355 case 6
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356 dst |= src
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357 update_flags Z
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358 case 7
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359 cmp dst src
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360 update_flags ZAC
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361 end
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362
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363 aluop16
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364 arg op 8
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365 arg src 16
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366 switch op
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367 case 0
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368 dst += src
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369 update_flags ZAC
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370 case 2
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371 dst -= src
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372 update_flags ZAC
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373 case 7
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374 dst -= src
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375 update_flags ZAC
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376 default
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377 #TODO: what happens in these invalid cases
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378 end
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379
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380 10001PPP alu_r_r
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381 local tmp_src 16
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382 local tmp_dst 16
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383 upd78k2_op_fetch
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384 scratch2 = scratch1 >> 4
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385 if scratch2 >=U 7
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386 #TODO: is MSB just ignored or is this treated as some kind of illegal instruction or nop?
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387 else
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388 scratch1 &= 0xF
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389 if scratch1 >=U 7
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390 scratch1 &= 7
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391 meta dst tmp_dst
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392 tmp_dst = a << 8
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393 tmp_dst |= x
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394 switch scratch1
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395 case 0
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396 tmp_src = a << 8
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397 tmp_src |= x
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398 case 2
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399 tmp_src = b << 8
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400 tmp_src |= c
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401 case 4
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402 tmp_src = d << 8
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403 tmp_src |= e
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404 case 6
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405 tmp_src = h << 8
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406 tmp_src |= l
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407 default
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408 #TODO: what happens in these invalid cases
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409 end
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410 aluop16 P tmp_src
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411 x = tmp_dst
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412 a = tmp_dst >> 8
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413 else
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414 meta dst main.scratch2
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415 cycles 2 #penalty for extra IRAM access since regs are technically stored there?
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416 aluop P main.scratch1
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417 end
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418 end
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419
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420 10101PPP alu_immed
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421 upd78k2_op_fetch
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422 meta dst a
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423 aluop P scratch1
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424
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425 calc_addr_base
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426 arg regpair 8
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427 local tmp 16
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428 upd78k2_op_fetch
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429 switch regpair
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430 case 0
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431 #[de+byte]
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432 tmp = d << 8
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433 tmp |= e
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434 adst += tmp
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435 case 1
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436 #[sp+byte]
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437 adst += sp
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438 case 2
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439 #[hl+byte]
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440 tmp = h << 8
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441 tmp |= l
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442 adst += tmp
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443 end
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444
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445 read_base_mode
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446 arg regpair 8
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447 arg alt_bank 8
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448 meta adst scratch1
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449 calc_addr_base regpair
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450 mem_read scratch1 alt_bank
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451
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452 write_base_mode
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453 arg regpair 8
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454 arg value 8
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455 arg alt_bank 8
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456 meta adst scratch2
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457 calc_addr_base regpair
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458 mem_write scratch2 value alt_bank
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459
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460 calc_addr_regind
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461 arg regpair 8
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462 local tmp 16
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463 switch regpair
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464 case 0
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465 #[de+]
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466 adst = d << 8
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467 adst |= e
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468 tmp = adst + 1
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469 e = tmp
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470 d = tmp >> 8
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471 case 1
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472 #[hl+]
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473 adst = h << 8
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474 adst |= l
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475 tmp = adst + 1
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476 l = tmp
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477 h = tmp >> 8
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478 case 2
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479 #[de-]
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480 adst = d << 8
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481 adst |= e
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482 tmp = adst - 1
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483 e = tmp
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484 d = tmp >> 8
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485 case 3
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486 #[hl-]
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487 adst = h << 8
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488 adst |= l
|
|
|
489 tmp = adst - 1
|
|
|
490 l = tmp
|
|
|
491 h = tmp >> 8
|
|
|
492 case 4
|
|
|
493 #[de]
|
|
|
494 adst = d << 8
|
|
|
495 adst |= e
|
|
|
496 case 5
|
|
|
497 #[hl]
|
|
|
498 adst = h << 8
|
|
|
499 adst |= l
|
|
|
500 end
|
|
|
501
|
|
|
502 read_regind_mode
|
|
|
503 arg regpair 8
|
|
|
504 arg alt_bank 8
|
|
|
505 meta adst scratch1
|
|
|
506 calc_addr_regind regpair
|
|
|
507 mem_read scratch1 alt_bank
|
|
|
508
|
|
|
509 write_regind_mode
|
|
|
510 arg regpair 8
|
|
|
511 arg value 8
|
|
|
512 arg alt_bank 8
|
|
|
513 meta adst scratch2
|
|
|
514 calc_addr_regind regpair
|
|
|
515 mem_write scratch2 value alt_bank
|
|
|
516
|
|
|
517 calc_addr_indexed
|
|
|
518 arg index_reg 8
|
|
|
519 local tmp 16
|
|
|
520 upd78k2_op_fetch_word
|
|
|
521 switch index_reg
|
|
|
522 case 0
|
|
|
523 tmp = d << 8
|
|
|
524 tmp |= e
|
|
|
525 adst += tmp
|
|
|
526 case 1
|
|
|
527 adst += a
|
|
|
528 case 2
|
|
|
529 tmp = h << 8
|
|
|
530 tmp |= l
|
|
|
531 adst += tmp
|
|
|
532 case 3
|
|
|
533 adst += b
|
|
|
534 end
|
|
|
535
|
|
|
536 read_indexed_mode
|
|
|
537 arg index_reg 8
|
|
|
538 arg alt_bank 8
|
|
|
539 meta adst scratch1
|
|
|
540 calc_addr_indexed index_reg
|
|
|
541 mem_read scratch1 alt_bank
|
|
|
542
|
|
|
543 write_indexed_mode
|
|
|
544 arg index_reg 8
|
|
|
545 arg value 8
|
|
|
546 arg alt_bank 8
|
|
|
547 meta adst scratch2
|
|
|
548 calc_addr_indexed index_reg
|
|
|
549 mem_write scratch2 value alt_bank
|
|
|
550
|
|
|
551 base 00RR1PPP alu_base
|
|
|
552 invalid R 3
|
|
|
553 read_base_mode R 0
|
|
|
554 meta dst a
|
|
|
555 aluop P scratch1
|
|
|
556
|
|
|
557 alt_base 00RR1PPP alu_alt_base
|
|
|
558 invalid R 3
|
|
|
559 read_base_mode R 1
|
|
|
560 meta dst a
|
|
|
561 aluop P scratch1
|
|
|
562
|
|
|
563 base 00RR0000 mov_a_base
|
|
|
564 invalid R 3
|
|
|
565 read_base_mode R 0
|
|
|
566 a = scratch1
|
|
|
567
|
|
|
568 alt_base 00RR0000 alt_mov_a_base
|
|
|
569 invalid R 3
|
|
|
570 read_base_mode R 1
|
|
|
571 a = scratch1
|
|
|
572
|
|
|
573 base 10RR0000 mov_base_a
|
|
|
574 invalid R 3
|
|
|
575 write_base_mode R a 0
|
|
|
576
|
|
|
577 alt_base 10RR0000 alt_mov_base_a
|
|
|
578 invalid R 3
|
|
|
579 write_base_mode R a 1
|
|
|
580
|
|
|
581 regind 0RRR1PPP alu_reg_indirect
|
|
|
582 invalid R 6
|
|
|
583 invalid R 7
|
|
|
584 read_regind_mode R 0
|
|
|
585 meta dst a
|
|
|
586 aluop P scratch1
|
|
|
587
|
|
|
588 alt_regind 0RRR1PPP alu_alt_reg_indirect
|
|
|
589 invalid R 6
|
|
|
590 invalid R 7
|
|
|
591 read_regind_mode R 1
|
|
|
592 meta dst a
|
|
|
593 aluop P scratch1
|
|
|
594
|
|
|
595 regind 0RRR0000 mov_a_reg_indirect
|
|
|
596 invalid R 6
|
|
|
597 invalid R 7
|
|
|
598 read_regind_mode R 0
|
|
|
599 a = scratch1
|
|
|
600
|
|
|
601 alt_regind 0RRR0000 alt_mov_a_reg_indirect
|
|
|
602 invalid R 6
|
|
|
603 invalid R 7
|
|
|
604 read_regind_mode R 1
|
|
|
605 a = scratch1
|
|
|
606
|
|
|
607 regind 1RRR0000 mov_reg_indirect_a
|
|
|
608 invalid R 6
|
|
|
609 invalid R 7
|
|
|
610 write_regind_mode R a 0
|
|
|
611
|
|
|
612 alt_regind 1RRR0000 alt_mov_reg_indirect_a
|
|
|
613 invalid R 6
|
|
|
614 invalid R 7
|
|
|
615 write_regind_mode R a 1
|
|
|
616
|
|
|
617 01010RRR mov_reg_indirect_a_short
|
|
|
618 invalid R 6
|
|
|
619 invalid R 7
|
|
|
620 write_regind_mode R a 0
|
|
|
621
|
|
|
622 01011RRR mov_a_reg_indirect_short
|
|
|
623 invalid R 6
|
|
|
624 invalid R 7
|
|
|
625 read_regind_mode R 0
|
|
|
626 a = scratch1
|
|
|
627
|
|
|
628 indexed 00RR1PPP alu_indexed
|
|
|
629 read_indexed_mode R 0
|
|
|
630 meta dst a
|
|
|
631 aluop P scratch1
|
|
|
632
|
|
|
633 alt_indexed 00RR1PPP alu_alt_indexed
|
|
|
634 read_indexed_mode R 1
|
|
|
635 meta dst a
|
|
|
636 aluop P scratch1
|
|
|
637
|
|
|
638 indexed 00RR0000 mov_a_indexed
|
|
|
639 read_indexed_mode R 0
|
|
|
640 a = scratch1
|
|
|
641
|
|
|
642 alt_indexed 00RR0000 alt_mov_a_indexed
|
|
|
643 read_indexed_mode R 1
|
|
|
644 a = scratch1
|
|
|
645
|
|
|
646 indexed 10RR0000 mov_indexed_a
|
|
|
647 write_indexed_mode R a 0
|
|
|
648
|
|
|
649 alt_indexed 10RR0000 alt_mov_indexed_a
|
|
|
650 write_indexed_mode R a 1
|
|
|
651
|
|
|
652 mov_reg 0DD01SS0 movw_rp_rp
|
|
|
653 local dst 8
|
|
|
654 local src 8
|
|
|
655 dst = D << 1
|
|
|
656 src = S << 1
|
|
|
657 main.dst = main.src
|
|
|
658 dst += 1
|
|
|
659 src += 1
|
|
|
660 main.dst = main.src
|
|
|
661
|
|
|
662 mov_reg 0DDD0SSS mov_r_r
|
|
|
663 main.D = main.S
|
|
|
664
|
|
|
665 01100PP0 movw_rp_immed
|
|
|
666 local dst 8
|
|
|
667 dst = P << 1
|
|
|
668 upd78k2_op_fetch
|
|
|
669 main.dst = scratch1
|
|
|
670 dst += 1
|
|
|
671 upd78k2_op_fetch
|
|
|
672 main.dst = scratch1
|
|
|
673
|
|
|
674 11000RRR inc_r
|
|
|
675 cycles 2
|
|
|
676 main.R += 1
|
|
|
677 update_flags ZA
|
|
|
678
|
|
|
679 11001RRR dec_r
|
|
|
680 cycles 2
|
|
|
681 main.R -= 1
|
|
|
682 update_flags ZA
|
|
|
683
|
|
|
684 11010RRR mov_a_r
|
|
|
685 a = main.R
|
|
|
686
|
|
|
687 muldiv 01001PP0 br_rp
|
|
|
688 local reg 8
|
|
|
689 local tmp 16
|
|
|
690 reg = P << 1
|
|
|
691 pc = main.reg
|
|
|
692 reg += 1
|
|
|
693 tmp = main.reg << 8
|
|
|
694 pc |= tmp
|
|
|
695
|
|
|
696 00010100 br_rel
|
|
|
697 upd78k2_op_fetch
|
|
|
698 sext 16 scratch1 scratch1
|
|
|
699 pc += scratch1
|
|
|
700
|
|
|
701 00101100 br_abs
|
|
|
702 upd78k2_op_fetch_word
|
|
|
703 pc = scratch1
|
|
|
704
|
|
|
705 100000FS bcc
|
|
|
706 local flag 8
|
|
|
707 upd78k2_op_fetch
|
|
|
708 if F
|
|
|
709 flag = chflags >> 7
|
|
|
710 else
|
|
|
711 flag = zflag
|
|
|
712 end
|
|
|
713 if flag = S
|
|
|
714 sext 16 scratch1 scratch1
|
|
|
715 pc += scratch1
|
|
|
716 end
|
|
|
717
|
|
|
718 muldiv 01011PP0 call_rp
|
|
|
719 local reg 8
|
|
|
720 local tmp 16
|
|
|
721 push_word pc
|
|
|
722 reg = P << 1
|
|
|
723 pc = main.reg
|
|
|
724 reg += 1
|
|
|
725 tmp = main.reg << 8
|
|
|
726 pc |= tmp
|
|
|
727
|
|
|
728 00101000 call_long
|
|
|
729 local address 16
|
|
|
730 upd78k2_op_fetch_word
|
|
|
731 address = scratch1
|
|
|
732 push_word pc
|
|
|
733 pc = address
|
|
|
734
|
|
|
735 10010AAA call_short
|
|
|
736 local address 16
|
|
|
737 address = A << 8
|
|
|
738 address |= 0x800
|
|
|
739 upd78k2_op_fetch
|
|
|
740 address |= scratch1
|
|
|
741 push_word pc
|
|
|
742 pc = address
|
|
|
743
|
|
|
744 111TTTTT call_table
|
|
|
745 local address 16
|
|
|
746 mem_read_no_exp T
|
|
|
747 address = scratch1
|
|
|
748 scratch1 = T + 1
|
|
|
749 mem_read_no_exp scratch1
|
|
|
750 scratch1 <<= 8
|
|
|
751 address |= 8
|
|
|
752 push_word pc
|
|
|
753 pc = address
|
|
|
754
|
|
|
755 01010110 ret
|
|
|
756 meta dst pc
|
|
|
757 pop_word
|
|
|
758
|
|
|
759 001101PP pop_rp
|
|
|
760 local rp 8
|
|
|
761 local word 16
|
|
|
762 meta dst word
|
|
|
763 pop_word
|
|
|
764 main.rp = word
|
|
|
765 rp += 1
|
|
|
766 main.rp = word >> 8
|
|
|
767
|
|
|
768 001111PP push_rp
|
|
|
769 local rp 8
|
|
|
770 local word 16
|
|
|
771 rp = P << 1
|
|
|
772 rp += 1
|
|
|
773 word = main.rp << 8
|
|
|
774 rp -= 1
|
|
|
775 word |= main.rp
|
|
|
776 push_word word
|
|
|
777
|
|
|
778 muldiv 101010NN sel
|
|
|
779 local offset 8
|
|
|
780 if N != rbs
|
|
|
781 offset = rbs << 3
|
|
|
782 offset = 0xF8 - offset
|
|
|
783 iram.offset = x
|
|
|
784 offset += 1
|
|
|
785 iram.offset = a
|
|
|
786 offset += 1
|
|
|
787 iram.offset = c
|
|
|
788 offset += 1
|
|
|
789 iram.offset = b
|
|
|
790 offset += 1
|
|
|
791 iram.offset = e
|
|
|
792 offset += 1
|
|
|
793 iram.offset = d
|
|
|
794 offset += 1
|
|
|
795 iram.offset = l
|
|
|
796 offset += 1
|
|
|
797 iram.offset = h
|
|
|
798 offset = N << 3
|
|
|
799 offset = 0xF8 - offset
|
|
|
800 x = iram.offset
|
|
|
801 offset += 1
|
|
|
802 a = iram.offset
|
|
|
803 offset += 1
|
|
|
804 c = iram.offset
|
|
|
805 offset += 1
|
|
|
806 b = iram.offset
|
|
|
807 offset += 1
|
|
|
808 e = iram.offset
|
|
|
809 offset += 1
|
|
|
810 d = iram.offset
|
|
|
811 offset += 1
|
|
|
812 l = iram.offset
|
|
|
813 offset += 1
|
|
|
814 h = iram.offset
|
|
|
815 rbs = N
|
|
|
816 end
|
|
|
817
|
|
|
818 muldiv 11001000 incw_sp
|
|
|
819 sp += 1
|
|
|
820
|
|
|
821 muldiv 11001001 decw_sp
|
|
|
822 sp -= 1
|
|
|
823
|
|
|
824 00001011 movw_sfrp_immed
|
|
|
825 upd78k2_op_fetch
|
|
|
826 if scratch1 = 0xFC
|
|
|
827 #unclear if SP is actually mapped in the SFR space
|
|
|
828 #or if this is special cased, but the docs don't
|
|
|
829 #suggest you can write to SP with other SFR-targeting
|
|
|
830 #instructions so I'm assuming the latter.
|
|
|
831 upd78k2_op_fetch
|
|
|
832 sp = scratch1
|
|
|
833 upd78k2_op_fetch
|
|
|
834 scratch1 <<= 8
|
|
|
835 sp |= scratch1
|
|
|
836 else
|
|
|
837 scratch2 = scratch1
|
|
|
838 upd78k2_op_fetch
|
|
|
839 sfr_write scratch2 scratch1
|
|
|
840 scratch2 += 1
|
|
|
841 upd78k2_op_fetch
|
|
|
842 sfr_write scratch2 scratch1
|
|
|
843 end
|
|
|
844
|
|
|
845 00001100 movw_sadrp_word
|
|
|
846 local offset 8
|
|
|
847 upd78k2_op_fetch
|
|
|
848 offset = scratch1
|
|
|
849 upd78k2_op_fetch
|
|
|
850 saddr_write offset scratch1
|
|
|
851 offset += 1
|
|
|
852 upd78k2_op_fetch
|
|
|
853 saddr_write offset scratch1 |
