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annotate dis.c @ 217:acd29e2664c6

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Added testcases file. Some fixes to test generator for dealing with indexed mode with base and index reg the same. Added support for blastem headless mode in test runner.
author Mike Pavone <pavone@retrodev.com>
date Sat, 20 Apr 2013 00:29:14 -0700
parents 7c227a8ec53d
children 140af5509ce7
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 #include "68kinst.h"
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2 #include <stdio.h>
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3 #include <stdlib.h>
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4
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5 uint8_t visited[(16*1024*1024)/16];
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6 uint8_t label[(16*1024*1024)/8];
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7
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8 void visit(uint32_t address)
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9 {
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10 address &= 0xFFFFFF;
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11 visited[address/16] |= 1 << ((address / 2) % 8);
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12 }
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13
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14 void reference(uint32_t address)
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15 {
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16 address &= 0xFFFFFF;
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17 //printf("referenced: %X\n", address);
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18 label[address/16] |= 1 << (address % 8);
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19 }
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20
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21 uint8_t is_visited(uint32_t address)
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22 {
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23 address &= 0xFFFFFF;
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24 return visited[address/16] & (1 << ((address / 2) % 8));
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25 }
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26
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27 uint8_t is_label(uint32_t address)
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28 {
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29 address &= 0xFFFFFF;
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30 return label[address/16] & (1 << (address % 8));
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31 }
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32
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33 typedef struct deferred {
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34 uint32_t address;
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35 struct deferred *next;
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36 } deferred;
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37
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38 deferred * defer(uint32_t address, deferred * next)
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39 {
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40 if (is_visited(address)) {
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41 return next;
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42 }
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43 //printf("deferring %X\n", address);
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44 deferred * d = malloc(sizeof(deferred));
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45 d->address = address;
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46 d->next = next;
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47 return d;
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48 }
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49
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50 void check_reference(m68kinst * inst, m68k_op_info * op)
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51 {
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52 switch(op->addr_mode)
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53 {
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54 case MODE_PC_DISPLACE:
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55 reference(inst->address + 2 + op->params.regs.displacement);
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56 break;
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57 case MODE_ABSOLUTE:
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58 case MODE_ABSOLUTE_SHORT:
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59 reference(op->params.immed);
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60 break;
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61 }
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62 }
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63
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64 uint8_t labels = 0;
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65 uint8_t addr = 0;
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66 uint8_t only = 0;
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67
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68 int main(int argc, char ** argv)
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69 {
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70 long filesize;
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71 unsigned short *filebuf;
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72 char disbuf[1024];
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73 m68kinst instbuf;
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74 unsigned short * cur;
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75 FILE * f = fopen(argv[1], "rb");
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76 fseek(f, 0, SEEK_END);
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77 filesize = ftell(f);
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78 fseek(f, 0, SEEK_SET);
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79 filebuf = malloc(filesize);
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80 fread(filebuf, 2, filesize/2, f);
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81 fclose(f);
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82 deferred *def = NULL, *tmpd;
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83 for(uint8_t opt = 2; opt < argc; ++opt) {
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84 if (argv[opt][0] == '-') {
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85 FILE * address_log;
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86 switch (argv[opt][1])
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87 {
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88 case 'l':
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89 labels = 1;
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90 break;
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91 case 'a':
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92 addr = 1;
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93 break;
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94 case 'o':
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95 only = 1;
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96 break;
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97 case 'f':
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98 opt++;
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99 if (opt >= argc) {
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100 fputs("-f must be followed by a filename\n", stderr);
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101 exit(1);
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102 }
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103 address_log = fopen(argv[opt], "r");
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104 if (!address_log) {
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105 fprintf(stderr, "Failed to open %s for reading\n", argv[opt]);
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106 exit(1);
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107 }
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108 while (fgets(disbuf, sizeof(disbuf), address_log)) {
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109 if (disbuf[0]) {
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110 uint32_t address = strtol(disbuf, NULL, 16);
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111 if (address) {
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112 def = defer(address, def);
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113 reference(address);
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114 }
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115 }
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116 }
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117 }
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118 } else {
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119 uint32_t address = strtol(argv[opt], NULL, 16);
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120 def = defer(address, def);
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121 reference(address);
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122 }
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123 }
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124 for(cur = filebuf; cur - filebuf < (filesize/2); ++cur)
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125 {
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126 *cur = (*cur >> 8) | (*cur << 8);
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127 }
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128 uint32_t start = filebuf[2] << 16 | filebuf[3], tmp_addr;
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129 uint32_t int_2 = filebuf[0x68/2] << 16 | filebuf[0x6A/2];
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130 uint32_t int_4 = filebuf[0x70/2] << 16 | filebuf[0x72/2];
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131 uint32_t int_6 = filebuf[0x78/2] << 16 | filebuf[0x7A/2];
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132 uint16_t *encoded, *next;
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133 uint32_t size;
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134 if (!def || !only) {
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135 def = defer(start, def);
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136 def = defer(int_2, def);
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137 def = defer(int_4, def);
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138 def = defer(int_6, def);
6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents: 148
diff changeset
139 }
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
140 uint32_t address;
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
141 while(def) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
142 do {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
143 encoded = NULL;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
144 address = def->address;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
145 if (!is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
146 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
147 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
148 tmpd = def;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
149 def = def->next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
150 free(tmpd);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
151 } while(def && encoded == NULL);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
152 if (!encoded) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
153 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
154 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
155 for(;;) {
48
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
156 if (address > filesize) {
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
157 break;
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
158 }
47
4b6c667326a1 Fix bug in address visitation in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 44
diff changeset
159 visit(address);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
160 next = m68k_decode(encoded, &instbuf, address);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
161 address += (next-encoded)*2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
162 encoded = next;
111
8b50d2c975b2 Fix decoding of Scc
Mike Pavone <pavone@retrodev.com>
parents: 103
diff changeset
163 //m68k_disasm(&instbuf, disbuf);
8b50d2c975b2 Fix decoding of Scc
Mike Pavone <pavone@retrodev.com>
parents: 103
diff changeset
164 //printf("%X: %s\n", instbuf.address, disbuf);
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
165 check_reference(&instbuf, &(instbuf.src));
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
166 check_reference(&instbuf, &(instbuf.dst));
148
4a400aec81bb Bail out of disassembly of a particular stream when we hit an invalid instruction
Mike Pavone <pavone@retrodev.com>
parents: 139
diff changeset
167 if (instbuf.op == M68K_ILLEGAL || instbuf.op == M68K_RTS || instbuf.op == M68K_RTE || instbuf.op == M68K_INVALID) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
168 break;
164
afbfb0ac0256 Small fix to disassembler
Mike Pavone <pavone@retrodev.com>
parents: 151
diff changeset
169 }
afbfb0ac0256 Small fix to disassembler
Mike Pavone <pavone@retrodev.com>
parents: 151
diff changeset
170 if (instbuf.op == M68K_BCC || instbuf.op == M68K_DBCC || instbuf.op == M68K_BSR) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
171 if (instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
172 address = instbuf.address + 2 + instbuf.src.params.immed;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
173 encoded = filebuf + address/2;
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
174 reference(address);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
175 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
176 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
177 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
178 } else {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
179 tmp_addr = instbuf.address + 2 + instbuf.src.params.immed;
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
180 reference(tmp_addr);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
181 def = defer(tmp_addr, def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
182 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
183 } else if(instbuf.op == M68K_JMP) {
80
7b1e16e981ef Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents: 48
diff changeset
184 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
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parents: 20
diff changeset
185 address = instbuf.src.params.immed;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
186 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
187 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
188 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
189 }
114
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
190 } else if (instbuf.src.addr_mode = MODE_PC_DISPLACE) {
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
191 address = instbuf.src.params.regs.displacement + instbuf.address + 2;
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
192 encoded = filebuf + address/2;
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
193 if (is_visited(address)) {
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
194 break;
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
195 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
196 } else {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
197 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
198 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
199 } else if(instbuf.op == M68K_JSR) {
80
7b1e16e981ef Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents: 48
diff changeset
200 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
201 def = defer(instbuf.src.params.immed, def);
164
afbfb0ac0256 Small fix to disassembler
Mike Pavone <pavone@retrodev.com>
parents: 151
diff changeset
202 } else if (instbuf.src.addr_mode == MODE_PC_DISPLACE) {
114
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
203 def = defer(instbuf.src.params.regs.displacement + instbuf.address + 2, def);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
204 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
205 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
206 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
207 }
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
208 if (labels) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
209 for (address = filesize; address < (16*1024*1024); address++) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
210 if (is_label(address)) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
211 printf("ADR_%X equ $%X\n", address, address);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
212 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
213 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
214 puts("");
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
215 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
216 for (address = 0; address < filesize; address+=2) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
217 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
218 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
219 m68k_decode(encoded, &instbuf, address);
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
220 if (labels) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
221 m68k_disasm_labels(&instbuf, disbuf);
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
222 if (address == start) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
223 puts("start:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
224 }
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
225 if(address == int_2) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
226 puts("int_2:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
227 }
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
228 if(address == int_4) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
229 puts("int_4:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
230 }
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
231 if(address == int_6) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
232 puts("int_6:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
233 }
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
234 if (is_label(instbuf.address)) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
235 printf("ADR_%X:\n", instbuf.address);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
236 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
237 if (addr) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
238 printf("\t%s\t;%X\n", disbuf, instbuf.address);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
239 } else {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
240 printf("\t%s\n", disbuf);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
241 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
242 } else {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
243 m68k_disasm(&instbuf, disbuf);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
244 printf("%X: %s\n", instbuf.address, disbuf);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
245 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
246 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
247 }
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
248 return 0;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
249 }