annotate dis.c @ 139:cce22fb4c450

Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
author Mike Pavone <pavone@retrodev.com>
date Mon, 31 Dec 2012 11:54:27 -0800
parents ab50421b1b7a
children 4a400aec81bb
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1 #include "68kinst.h"
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2 #include <stdio.h>
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3 #include <stdlib.h>
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
5 uint8_t visited[(16*1024*1024)/16];
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
6 uint8_t label[(16*1024*1024)/8];
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
7
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
8 void visit(uint32_t address)
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
9 {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
10 address &= 0xFFFFFF;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
11 visited[address/16] |= 1 << ((address / 2) % 8);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
12 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
13
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
14 void reference(uint32_t address)
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
15 {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
16 address &= 0xFFFFFF;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
17 //printf("referenced: %X\n", address);
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
18 label[address/16] |= 1 << (address % 8);
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
19 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
20
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
21 uint8_t is_visited(uint32_t address)
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
22 {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
23 address &= 0xFFFFFF;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
24 return visited[address/16] & (1 << ((address / 2) % 8));
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
25 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
26
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
27 uint8_t is_label(uint32_t address)
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
28 {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
29 address &= 0xFFFFFF;
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
30 return label[address/16] & (1 << (address % 8));
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
31 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
32
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
33 typedef struct deferred {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
34 uint32_t address;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
35 struct deferred *next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
36 } deferred;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
37
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
38 deferred * defer(uint32_t address, deferred * next)
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
39 {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
40 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
41 return next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
42 }
111
8b50d2c975b2 Fix decoding of Scc
Mike Pavone <pavone@retrodev.com>
parents: 103
diff changeset
43 //printf("deferring %X\n", address);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
44 deferred * d = malloc(sizeof(deferred));
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
45 d->address = address;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
46 d->next = next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
47 return d;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
48 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
49
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
50 void check_reference(m68kinst * inst, m68k_op_info * op)
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
51 {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
52 switch(op->addr_mode)
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
53 {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
54 case MODE_PC_DISPLACE:
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
55 reference(inst->address + 2 + op->params.regs.displacement);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
56 break;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
57 case MODE_ABSOLUTE:
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
58 case MODE_ABSOLUTE_SHORT:
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
59 reference(op->params.immed);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
60 break;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
61 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
62 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
63
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
64 uint8_t labels = 0;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
65 uint8_t addr = 0;
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
66
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
67 int main(int argc, char ** argv)
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
68 {
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
69 long filesize;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
70 unsigned short *filebuf;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
71 char disbuf[1024];
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
72 m68kinst instbuf;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
73 unsigned short * cur;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
74 FILE * f = fopen(argv[1], "rb");
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
75 fseek(f, 0, SEEK_END);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
76 filesize = ftell(f);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
77 fseek(f, 0, SEEK_SET);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
78 filebuf = malloc(filesize);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
79 fread(filebuf, 2, filesize/2, f);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
80 fclose(f);
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
81 for(uint8_t opt = 2; opt < argc; ++opt) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
82 if (argv[opt][0] == '-') {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
83 switch (argv[opt][1])
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
84 {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
85 case 'l':
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
86 labels = 1;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
87 break;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
88 case 'a':
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
89 addr = 1;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
90 break;
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
91 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
92 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
93 }
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
94 for(cur = filebuf; cur - filebuf < (filesize/2); ++cur)
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
95 {
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
96 *cur = (*cur >> 8) | (*cur << 8);
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
97 }
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
98 uint32_t start = filebuf[2] << 16 | filebuf[3], tmp_addr;
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
99 uint32_t int_2 = filebuf[0x68/2] << 16 | filebuf[0x6A/2];
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
100 uint32_t int_4 = filebuf[0x70/2] << 16 | filebuf[0x72/2];
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
101 uint32_t int_6 = filebuf[0x78/2] << 16 | filebuf[0x7A/2];
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
102 uint16_t *encoded, *next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
103 uint32_t size;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
104 deferred *def = NULL, *tmpd;
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
105 def = defer(start, def);
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
106 def = defer(int_2, def);
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
107 def = defer(int_4, def);
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
108 def = defer(int_6, def);
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
109 uint32_t address;
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
110 while(def) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
111 do {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
112 encoded = NULL;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
113 address = def->address;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
114 if (!is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
115 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
116 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
117 tmpd = def;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
118 def = def->next;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
119 free(tmpd);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
120 } while(def && encoded == NULL);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
121 if (!encoded) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
122 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
123 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
124 for(;;) {
48
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
125 if (address > filesize) {
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
126 break;
0bdda50c7364 Don't try to disassemble addresses beyond the end of the cartridge
Mike Pavone <pavone@retrodev.com>
parents: 47
diff changeset
127 }
47
4b6c667326a1 Fix bug in address visitation in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 44
diff changeset
128 visit(address);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
129 next = m68k_decode(encoded, &instbuf, address);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
130 address += (next-encoded)*2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
131 encoded = next;
111
8b50d2c975b2 Fix decoding of Scc
Mike Pavone <pavone@retrodev.com>
parents: 103
diff changeset
132 //m68k_disasm(&instbuf, disbuf);
8b50d2c975b2 Fix decoding of Scc
Mike Pavone <pavone@retrodev.com>
parents: 103
diff changeset
133 //printf("%X: %s\n", instbuf.address, disbuf);
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
134 check_reference(&instbuf, &(instbuf.src));
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
135 check_reference(&instbuf, &(instbuf.dst));
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
136 if (instbuf.op == M68K_ILLEGAL || instbuf.op == M68K_RTS || instbuf.op == M68K_RTE) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
137 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
138 } else if (instbuf.op == M68K_BCC || instbuf.op == M68K_DBCC || instbuf.op == M68K_BSR) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
139 if (instbuf.op == M68K_BCC && instbuf.extra.cond == COND_TRUE) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
140 address = instbuf.address + 2 + instbuf.src.params.immed;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
141 encoded = filebuf + address/2;
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
142 reference(address);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
143 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
144 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
145 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
146 } else {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
147 tmp_addr = instbuf.address + 2 + instbuf.src.params.immed;
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
148 reference(tmp_addr);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
149 def = defer(tmp_addr, def);
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
150 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
151 } else if(instbuf.op == M68K_JMP) {
80
7b1e16e981ef Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents: 48
diff changeset
152 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
153 address = instbuf.src.params.immed;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
154 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
155 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
156 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
157 }
114
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
158 } else if (instbuf.src.addr_mode = MODE_PC_DISPLACE) {
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
159 address = instbuf.src.params.regs.displacement + instbuf.address + 2;
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
160 encoded = filebuf + address/2;
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
161 if (is_visited(address)) {
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
162 break;
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
163 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
164 } else {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
165 break;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
166 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
167 } else if(instbuf.op == M68K_JSR) {
80
7b1e16e981ef Fix bug in disassembler that caused it to disassemble addresses it shouldn't
Mike Pavone <pavone@retrodev.com>
parents: 48
diff changeset
168 if (instbuf.src.addr_mode == MODE_ABSOLUTE || instbuf.src.addr_mode == MODE_ABSOLUTE_SHORT) {
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
169 def = defer(instbuf.src.params.immed, def);
114
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
170 } else if (instbuf.src.addr_mode = MODE_PC_DISPLACE) {
e821b6fde0e4 Allow jmp/jsr to follow pc-relative addresses in disassembler
Mike Pavone <pavone@retrodev.com>
parents: 111
diff changeset
171 def = defer(instbuf.src.params.regs.displacement + instbuf.address + 2, def);
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
172 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
173 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
174 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
175 }
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
176 if (labels) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
177 for (address = filesize; address < (16*1024*1024); address++) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
178 if (is_label(address)) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
179 printf("ADR_%X equ $%X\n", address, address);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
180 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
181 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
182 puts("");
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
183 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
184 for (address = 0; address < filesize; address+=2) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
185 if (is_visited(address)) {
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
186 encoded = filebuf + address/2;
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
187 m68k_decode(encoded, &instbuf, address);
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
188 if (labels) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
189 m68k_disasm_labels(&instbuf, disbuf);
139
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
190 if (address == start) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
191 puts("start:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
192 }
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
193 if(address == int_2) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
194 puts("int_2:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
195 }
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
196 if(address == int_4) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
197 puts("int_4:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
198 }
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
199 if(address == int_6) {
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
200 puts("int_6:");
cce22fb4c450 Properly support references to odd addresses in label generation in disassembler. Add labels for start and interrupts.
Mike Pavone <pavone@retrodev.com>
parents: 134
diff changeset
201 }
134
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
202 if (is_label(instbuf.address)) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
203 printf("ADR_%X:\n", instbuf.address);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
204 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
205 if (addr) {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
206 printf("\t%s\t;%X\n", disbuf, instbuf.address);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
207 } else {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
208 printf("\t%s\n", disbuf);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
209 }
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
210 } else {
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
211 m68k_disasm(&instbuf, disbuf);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
212 printf("%X: %s\n", instbuf.address, disbuf);
ab50421b1b7a Improve disassembler
Mike Pavone <pavone@retrodev.com>
parents: 114
diff changeset
213 }
44
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
214 }
ec71370820f2 Add logic for following control flow based on logic in the translator
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
215 }
2
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
216 return 0;
5df303bf72e6 Improve 68K instruction decoding. Add simple disassembler.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
217 }