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annotate vgm.h @ 2081:cfd53c94fffb

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Initial stab at RF5C164 emulation
author Michael Pavone <pavone@retrodev.com>
date Thu, 03 Feb 2022 23:15:42 -0800
parents 327332138c5c
children 92449b47cce8
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1 #ifndef VGM_H_
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2 #define VGM_H_
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3
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4 #include <stdint.h>
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5 #include <stdio.h>
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6
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7 #pragma pack(push, 1)
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8 typedef struct {
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9 char ident[4];
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10 uint32_t eof_offset;
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11 uint32_t version;
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12 uint32_t sn76489_clk;
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13 uint32_t ym2413_clk;
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14 uint32_t gd3_offset;
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15 uint32_t num_samples;
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16 uint32_t loop_offset;
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17 uint32_t loop_samples;
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18 uint32_t rate;
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19 uint16_t sn76489_fb;
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20 uint8_t sn76489_shift;
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21 uint8_t sn76489_flags;
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22 uint32_t ym2612_clk;
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23 uint32_t ym2151_clk;
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24 uint32_t data_offset;
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25 uint32_t sega_pcm_clk;
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26 uint32_t sega_pcm_reg;
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27 } vgm_header;
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28
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29 enum {
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30 CMD_PSG_STEREO = 0x4F,
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31 CMD_PSG,
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32 CMD_YM2413,
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33 CMD_YM2612_0,
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34 CMD_YM2612_1,
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35 CMD_YM2151,
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36 CMD_YM2203,
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37 CMD_YM2608_0,
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38 CMD_YM2608_1,
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39 CMD_YM2610_0,
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40 CMD_YM2610_1,
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41 CMD_YM3812,
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42 CMD_YM3526,
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43 CMD_Y8950,
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44 CMD_YMZ280B,
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45 CMD_YMF262_0,
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46 CMD_YMF262_1,
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47 CMD_WAIT = 0x61,
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48 CMD_WAIT_60,
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49 CMD_WAIT_50,
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50 CMD_END = 0x66,
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51 CMD_DATA,
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52 CMD_PCM_WRITE,
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53 CMD_WAIT_SHORT = 0x70,
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54 CMD_YM2612_DAC = 0x80,
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55 CMD_DAC_STREAM_SETUP = 0x90,
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56 CMD_DAC_STREAM_DATA,
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57 CMD_DAC_STREAM_FREQ,
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58 CMD_DAC_STREAM_START,
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59 CMD_DAC_STREAM_STOP,
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60 CMD_DAC_STREAM_STARTFAST,
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61 CMD_PCM68_REG = 0xB0,
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62 CMD_PCM164_REG,
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63 CMD_PCM68_RAM = 0xC1,
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64 CMD_PCM164_RAM = 0xC2,
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65 CMD_DATA_SEEK = 0xE0
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66 };
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67
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68 enum {
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69 DATA_YM2612_PCM = 0,
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70 DATA_RF5C68,
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71 DATA_RF5C164,
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72 };
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73
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74 #pragma pack(pop)
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75
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76 typedef struct data_block data_block;
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77 struct data_block {
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78 data_block *next;
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79 uint8_t *data;
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80 uint32_t size;
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81 uint8_t type;
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82 };
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84 typedef struct {
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85 vgm_header header;
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86 FILE *f;
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87 uint32_t master_clock;
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88 uint32_t last_cycle;
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89 uint32_t extra_delta;
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90 } vgm_writer;
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91
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92 vgm_writer *vgm_write_open(char *filename, uint32_t rate, uint32_t clock, uint32_t cycle);
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93 void vgm_sn76489_init(vgm_writer *writer, uint32_t clock, uint16_t feedback, uint8_t shift_reg_size, uint8_t flags);
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94 void vgm_sn76489_write(vgm_writer *writer, uint32_t cycle, uint8_t value);
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95 void vgm_ym2612_init(vgm_writer *writer, uint32_t clock);
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96 void vgm_ym2612_part1_write(vgm_writer *writer, uint32_t cycle, uint8_t reg, uint8_t value);
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97 void vgm_ym2612_part2_write(vgm_writer *writer, uint32_t cycle, uint8_t reg, uint8_t value);
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98 void vgm_adjust_cycles(vgm_writer *writer, uint32_t deduction);
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99 void vgm_close(vgm_writer *writer);
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100
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101 #endif //VGM_H_