Mercurial > repos > blastem
annotate backend.h @ 989:d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Wed, 27 Apr 2016 21:39:17 -0700 |
parents | 1f09994e92c5 |
children | 6b07af1515b5 |
rev | line source |
---|---|
467
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
1 /* |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
2 Copyright 2013 Michael Pavone |
555
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3 This file is part of BlastEm. |
467
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
140af5509ce7
Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
5 */ |
557
acec5464fa1e
Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
Mike Pavone <pavone@retrodev.com>
parents:
556
diff
changeset
|
6 #ifndef BACKEND_H_ |
acec5464fa1e
Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
Mike Pavone <pavone@retrodev.com>
parents:
556
diff
changeset
|
7 #define BACKEND_H_ |
211 | 8 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
9 #include <stdint.h> |
556 | 10 #include <stdio.h> |
563
c8fefa140c80
Moved some generic stuff from backend.h gen_arm.h and gen_arm.c into gen.h and gen.c. Added a couple fields to cpu_options so that gen_mem_fun can be made guest CPU generic
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
11 #include "gen.h" |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
12 |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
13 #define INVALID_OFFSET 0xFFFFFFFF |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
14 #define EXTENSION_WORD 0xFFFFFFFE |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
15 #define CYCLE_NEVER 0xFFFFFFFF |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
16 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
17 #if defined(X86_32) || defined(X86_64) |
211 | 18 typedef struct { |
19 int32_t disp; | |
20 uint8_t mode; | |
21 uint8_t base; | |
22 uint8_t index; | |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
23 } host_ea; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
24 #else |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
25 typedef struct { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
26 int32_t disp; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
27 uint8_t mode; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
28 uint8_t base; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
29 } host_ea; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
30 #endif |
211 | 31 |
32 typedef struct { | |
33 uint8_t *base; | |
34 int32_t *offsets; | |
35 } native_map_slot; | |
36 | |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
37 typedef struct deferred_addr { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
38 struct deferred_addr *next; |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
39 code_ptr dest; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
40 uint32_t address; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
41 } deferred_addr; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
42 |
555
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
43 typedef enum { |
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
44 READ_16, |
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
45 READ_8, |
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
46 WRITE_16, |
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
47 WRITE_8 |
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
48 } ftype; |
5af986d2b9da
Start work on refactoring some of the backend code to allow more sharing between M68K and Z80 cores and possibly also between x86 and the ARM backend when it exists
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
49 |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
50 #define MMAP_READ 0x01 |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
51 #define MMAP_WRITE 0x02 |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
52 #define MMAP_CODE 0x04 |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
53 #define MMAP_PTR_IDX 0x08 |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
54 #define MMAP_ONLY_ODD 0x10 |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
55 #define MMAP_ONLY_EVEN 0x20 |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
56 #define MMAP_FUNC_NULL 0x40 |
604
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
601
diff
changeset
|
57 #define MMAP_BYTESWAP 0x80 |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
58 |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
59 typedef uint16_t (*read_16_fun)(uint32_t address, void * context); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
60 typedef uint8_t (*read_8_fun)(uint32_t address, void * context); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
61 typedef void * (*write_16_fun)(uint32_t address, void * context, uint16_t value); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
62 typedef void * (*write_8_fun)(uint32_t address, void * context, uint8_t value); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
63 |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
64 typedef struct { |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
65 uint32_t start; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
66 uint32_t end; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
67 uint32_t mask; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
68 uint16_t ptr_index; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
69 uint16_t flags; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
70 void * buffer; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
71 read_16_fun read_16; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
72 write_16_fun write_16; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
73 read_8_fun read_8; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
74 write_8_fun write_8; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
75 } memmap_chunk; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
76 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
77 typedef struct { |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
78 uint32_t flags; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
79 native_map_slot *native_code_map; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
80 deferred_addr *deferred; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
81 code_info code; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
82 uint8_t **ram_inst_sizes; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
83 memmap_chunk const *memmap; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
84 code_ptr save_context; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
85 code_ptr load_context; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
86 code_ptr handle_cycle_limit; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
87 code_ptr handle_cycle_limit_int; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
88 code_ptr handle_code_write; |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
89 code_ptr handle_align_error_write; |
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
90 code_ptr handle_align_error_read; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
91 uint32_t memmap_chunks; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
92 uint32_t address_mask; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
93 uint32_t max_address; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
94 uint32_t bus_cycles; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
95 uint32_t clock_divider; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
96 int32_t mem_ptr_off; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
97 int32_t ram_flags_off; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
98 uint8_t ram_flags_shift; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
99 uint8_t address_size; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
100 uint8_t byte_swap; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
101 uint8_t context_reg; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
102 uint8_t cycles; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
103 uint8_t limit; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
104 uint8_t scratch1; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
105 uint8_t scratch2; |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
106 uint8_t align_error_mask; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
107 } cpu_options; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
108 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
109 typedef uint8_t * (*native_addr_func)(void * context, uint32_t address); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
110 |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
111 deferred_addr * defer_address(deferred_addr * old_head, uint32_t address, uint8_t *dest); |
282
7b8a49220e3b
Remove deferred address entries from abandoned translations inside z80_retrans_inst
Mike Pavone <pavone@retrodev.com>
parents:
252
diff
changeset
|
112 void remove_deferred_until(deferred_addr **head_ptr, deferred_addr * remove_to); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
113 void process_deferred(deferred_addr ** head_ptr, void * context, native_addr_func get_native); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
211
diff
changeset
|
114 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
563
diff
changeset
|
115 void cycles(cpu_options *opts, uint32_t num); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
563
diff
changeset
|
116 void check_cycles_int(cpu_options *opts, uint32_t address); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
563
diff
changeset
|
117 void check_cycles(cpu_options * opts); |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
118 void check_code_prologue(code_info *code); |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
119 void log_address(cpu_options *opts, uint32_t address, char * format); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
563
diff
changeset
|
120 |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
121 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc); |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
122 void * get_native_pointer(uint32_t address, void ** mem_pointers, cpu_options * opts); |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
668
diff
changeset
|
123 uint32_t chunk_size(cpu_options *opts, memmap_chunk const *chunk); |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
668
diff
changeset
|
124 uint32_t ram_size(cpu_options *opts); |
589
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
582
diff
changeset
|
125 |
557
acec5464fa1e
Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively
Mike Pavone <pavone@retrodev.com>
parents:
556
diff
changeset
|
126 #endif //BACKEND_H_ |
211 | 127 |