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changeset 601:f0061e3d2ad9

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Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
author Michael Pavone <pavone@retrodev.com>
date Fri, 26 Dec 2014 15:45:31 -0800
parents a9dcaacdc0c5
children 452ad0b42afa
files backend.h backend_x86.c m68k_core_x86.c m68k_internal.h z80_to_x86.c
diffstat 5 files changed, 24 insertions(+), 20 deletions(-) [+]
line wrap: on
line diff
--- a/backend.h	Fri Dec 26 13:42:25 2014 -0800
+++ b/backend.h	Fri Dec 26 15:45:31 2014 -0800
@@ -108,6 +108,7 @@
 void cycles(cpu_options *opts, uint32_t num);
 void check_cycles_int(cpu_options *opts, uint32_t address);
 void check_cycles(cpu_options * opts);
+void check_code_prologue(code_info *code);
 
 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc);
 
--- a/backend_x86.c	Fri Dec 26 13:42:25 2014 -0800
+++ b/backend_x86.c	Fri Dec 26 15:45:31 2014 -0800
@@ -28,6 +28,11 @@
 	*jmp_off = code->cur - (jmp_off+1);
 }
 
+void check_code_prologue(code_info *code)
+{
+	check_alloc_code(code, MAX_INST_LEN*4);
+}
+
 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc)
 {
 	code_info *code = &opts->code;
--- a/m68k_core_x86.c	Fri Dec 26 13:42:25 2014 -0800
+++ b/m68k_core_x86.c	Fri Dec 26 15:45:31 2014 -0800
@@ -2061,11 +2061,6 @@
 	call(code, (code_ptr)exit);
 }
 
-void check_code_prologue(code_info *code)
-{
-	check_alloc_code(code, MAX_INST_LEN*4);
-};
-
 void nop_fill_or_jmp_next(code_info *code, code_ptr old_end, code_ptr next_inst)
 {
 	if (next_inst == old_end && next_inst - code->cur < 2) {
--- a/m68k_internal.h	Fri Dec 26 13:42:25 2014 -0800
+++ b/m68k_internal.h	Fri Dec 26 15:45:31 2014 -0800
@@ -10,7 +10,6 @@
 
 //functions implemented in host CPU specfic file
 void translate_out_of_bounds(code_info *code);
-void check_code_prologue(code_info *code);
 void areg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg);
 void dreg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg);
 void areg_to_native_sx(m68k_options *opts, uint8_t reg, uint8_t native_reg);
--- a/z80_to_x86.c	Fri Dec 26 13:42:25 2014 -0800
+++ b/z80_to_x86.c	Fri Dec 26 15:45:31 2014 -0800
@@ -1303,7 +1303,7 @@
 			if (!call_dst) {
 				opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1);
 				//fake address to force large displacement
-				call_dst + 256;
+				call_dst = code->cur + 256;
 			}
 			jmp(code, call_dst);
 		} else {
@@ -1352,7 +1352,7 @@
 			if (!call_dst) {
 				opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1);
 				//fake address to force large displacement
-				call_dst + 256;
+				call_dst = code->cur + 256;
 			}
 			jmp(code, call_dst);
 		} else {
@@ -1371,7 +1371,7 @@
 			if (!call_dst) {
 				opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1);
 				//fake address to force large displacement
-				call_dst + 256;
+				call_dst = code->cur + 256;
 			}
 			jmp(code, call_dst);
 		} else {
@@ -1406,7 +1406,7 @@
 			if (!call_dst) {
 				opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1);
 				//fake address to force large displacement
-				call_dst + 256;
+				call_dst = code->cur + 256;
 			}
 			jmp(code, call_dst);
 		} else {
@@ -1429,7 +1429,7 @@
 			if (!call_dst) {
 				opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1);
 				//fake address to force large displacement
-				call_dst + 256;
+				call_dst = code->cur + 256;
 			}
 			jmp(code, call_dst);
 		} else {
@@ -1450,7 +1450,7 @@
 			if (!call_dst) {
 				opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1);
 				//fake address to force large displacement
-				call_dst + 256;
+				call_dst = code->cur + 256;
 			}
 			jmp(code, call_dst);
 		} else {
@@ -1498,7 +1498,7 @@
 			if (!call_dst) {
 				opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1);
 				//fake address to force large displacement
-				call_dst + 256;
+				call_dst = code->cur + 256;
 			}
 			jmp(code, call_dst);
 		} else {
@@ -1582,7 +1582,7 @@
 		if (!call_dst) {
 			opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1);
 			//fake address to force large displacement
-			call_dst + 256;
+			call_dst = code->cur + 256;
 		}
 		jmp(code, call_dst);
 		break;
@@ -1815,10 +1815,12 @@
 		code->cur = orig_start;
 		code->last = orig_start + ZMAX_NATIVE_SIZE;
 		translate_z80inst(&instbuf, context, address);
+		code_info tmp2 = *code;
+		*code = tmp_code;
 		if (!z80_is_terminal(&instbuf)) {
-			jmp(code, z80_get_native_address_trans(context, address + after-inst));
+			
+			jmp(&tmp2, z80_get_native_address_trans(context, address + after-inst));
 		}
-		*code = tmp_code;
 		z80_handle_deferred(context);
 		return orig_start;
 	}
@@ -1855,6 +1857,8 @@
 				jmp(&opts->gen.code, existing);
 				break;
 			}
+			//make sure prologue is in a contiguous chunk of code
+			check_code_prologue(&opts->gen.code);
 			next = z80_decode(encoded, &inst);
 			#ifdef DO_DEBUG_PRINT
 			z80_disasm(&inst, disbuf, address);
@@ -2228,12 +2232,12 @@
 {
 	static uint8_t * bp_stub = NULL;
 	z80_options * opts = context->options;
-	uint8_t * native = z80_get_native_address_trans(context, address);
+	code_ptr native = z80_get_native_address_trans(context, address);
 	code_info tmp_code = {native, native+16};
 	mov_ir(&tmp_code, address, opts->gen.scratch1, SZ_W);
 	if (!bp_stub) {
 		code_info *code = &opts->gen.code;
-		//TODO: do an alloc check here to make sure the prologue length calc works
+		check_code_prologue(code);
 		bp_stub = code->cur;
 		call(&tmp_code, bp_stub);
 
@@ -2257,13 +2261,13 @@
 		uint8_t * jmp_off = code->cur+1;
 		jcc(code, CC_NC, code->cur + 7);
 		pop_r(code, opts->gen.scratch1);
-		add_ir(code, check_int_size - (code->cur-native), opts->gen.scratch1, SZ_Q);
+		add_ir(code, check_int_size - (tmp_code.cur-native), opts->gen.scratch1, SZ_Q);
 		push_r(code, opts->gen.scratch1);
 		jmp(code, opts->gen.handle_cycle_limit_int);
 		*jmp_off = code->cur - (jmp_off+1);
 		//jump back to body of translated instruction
 		pop_r(code, opts->gen.scratch1);
-		add_ir(code, check_int_size - (code->cur-native), opts->gen.scratch1, SZ_Q);
+		add_ir(code, check_int_size - (tmp_code.cur-native), opts->gen.scratch1, SZ_Q);
 		jmp_r(code, opts->gen.scratch1);
 	} else {
 		call(&tmp_code, bp_stub);