Mercurial > repos > blastem
annotate vgm.h @ 2688:b42f00a3a937 default tip
Fix default target. Ensure m68k.h and z80.h are built before anything else when no dep info is available
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 31 Mar 2025 21:06:18 -0700 |
parents | 3f58fec775df |
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rev | line source |
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1 #ifndef VGM_H_ |
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2 #define VGM_H_ |
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3 |
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4 #include <stdint.h> |
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5 #include <stdio.h> |
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6 |
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7 #pragma pack(push, 1) |
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8 typedef struct { |
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9 char ident[4]; |
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10 uint32_t eof_offset; |
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11 uint32_t version; |
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12 uint32_t sn76489_clk; |
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13 uint32_t ym2413_clk; |
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14 uint32_t gd3_offset; |
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15 uint32_t num_samples; |
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16 uint32_t loop_offset; |
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17 uint32_t loop_samples; |
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18 uint32_t rate; |
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19 uint16_t sn76489_fb; |
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20 uint8_t sn76489_shift; |
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21 uint8_t sn76489_flags; |
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22 uint32_t ym2612_clk; |
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23 uint32_t ym2151_clk; |
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24 uint32_t data_offset; |
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25 uint32_t sega_pcm_clk; |
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26 uint32_t sega_pcm_reg; |
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27 } vgm_header; |
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28 |
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29 typedef struct { |
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30 uint32_t rf5c68_clk; |
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31 uint32_t ym2203_clk; |
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32 uint32_t ym2608_clk; |
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33 uint32_t ym2610_clk; |
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34 uint32_t ym3812_clk; |
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35 uint32_t ym3526_clk; |
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36 uint32_t y8950_clk; |
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37 uint32_t ymf262_clk; |
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38 uint32_t ymf278b_clk; |
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39 uint32_t ymf271_clk; |
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40 uint32_t ymz280b_clk; |
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41 uint32_t rf5c164_clk; |
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42 uint32_t pwm_clk; |
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43 uint32_t ay8910_clk; |
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44 uint8_t ay8910_type; |
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45 uint8_t ay8910_flags; |
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46 uint8_t ym2203_ay_flags; |
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47 uint8_t ym2608_ay_flags; |
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48 //TODO: additional header extension fields |
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49 } vgm_extended_header; |
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50 |
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51 enum { |
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52 CMD_PSG_STEREO = 0x4F, |
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53 CMD_PSG, |
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54 CMD_YM2413, |
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55 CMD_YM2612_0, |
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56 CMD_YM2612_1, |
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57 CMD_YM2151, |
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58 CMD_YM2203, |
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59 CMD_YM2608_0, |
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60 CMD_YM2608_1, |
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61 CMD_YM2610_0, |
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62 CMD_YM2610_1, |
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63 CMD_YM3812, |
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64 CMD_YM3526, |
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65 CMD_Y8950, |
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66 CMD_YMZ280B, |
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67 CMD_YMF262_0, |
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68 CMD_YMF262_1, |
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69 CMD_WAIT = 0x61, |
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70 CMD_WAIT_60, |
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71 CMD_WAIT_50, |
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72 CMD_END = 0x66, |
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73 CMD_DATA, |
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74 CMD_PCM_WRITE, |
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75 CMD_WAIT_SHORT = 0x70, |
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76 CMD_YM2612_DAC = 0x80, |
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77 CMD_DAC_STREAM_SETUP = 0x90, |
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78 CMD_DAC_STREAM_DATA, |
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79 CMD_DAC_STREAM_FREQ, |
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80 CMD_DAC_STREAM_START, |
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81 CMD_DAC_STREAM_STOP, |
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82 CMD_DAC_STREAM_STARTFAST, |
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83 CMD_PCM68_REG = 0xB0, |
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84 CMD_PCM164_REG, |
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85 CMD_PCM68_RAM = 0xC1, |
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86 CMD_PCM164_RAM = 0xC2, |
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87 CMD_DATA_SEEK = 0xE0 |
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88 }; |
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89 |
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90 enum { |
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91 DATA_YM2612_PCM = 0, |
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92 DATA_RF5C68, |
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93 DATA_RF5C164, |
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94 DATA_PWM |
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95 }; |
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96 |
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97 enum { |
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98 STREAM_CHIP_PSG, |
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99 STREAM_CHIP_YM2413, |
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100 STREAM_CHIP_YM2612, |
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101 STREAM_CHIP_YM2151, |
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102 STREAM_CHIP_RF5C68, |
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103 STREAM_CHIP_YM2203, |
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104 STREAM_CHIP_YM2608, |
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105 STREAM_CHIP_YM2610, |
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106 STREAM_CHIP_YM3812, |
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107 STREAM_CHIP_YM3526, |
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108 STREAM_CHIP_Y8950, |
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109 STREAM_CHIP_YMF262, |
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110 STREAM_CHIP_YMF278B, |
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111 STREAM_CHIP_YMF271, |
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112 STREAM_CHIP_YMZ280B, |
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113 STREAM_CHIP_RF5C164, |
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114 STREAM_CHIP_PWM |
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115 }; |
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116 |
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117 #pragma pack(pop) |
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118 |
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119 typedef struct data_block data_block; |
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120 struct data_block { |
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121 data_block *next; |
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122 uint8_t *data; |
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123 uint32_t size; |
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124 uint8_t type; |
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125 }; |
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126 |
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127 typedef struct { |
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128 vgm_header header; |
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129 vgm_extended_header ext; |
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130 FILE *f; |
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131 uint32_t master_clock; |
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132 uint32_t last_cycle; |
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133 uint32_t extra_delta; |
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134 uint32_t header_size; |
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135 } vgm_writer; |
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136 |
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137 vgm_writer *vgm_write_open(char *filename, uint32_t rate, uint32_t clock, uint32_t cycle); |
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138 void vgm_sn76489_init(vgm_writer *writer, uint32_t clock, uint16_t feedback, uint8_t shift_reg_size, uint8_t flags); |
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139 void vgm_sn76489_write(vgm_writer *writer, uint32_t cycle, uint8_t value); |
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140 void vgm_gg_pan_write(vgm_writer *writer, uint32_t cycle, uint8_t value); |
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141 void vgm_ym2612_init(vgm_writer *writer, uint32_t clock); |
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142 void vgm_ym2612_part1_write(vgm_writer *writer, uint32_t cycle, uint8_t reg, uint8_t value); |
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143 void vgm_ym2612_part2_write(vgm_writer *writer, uint32_t cycle, uint8_t reg, uint8_t value); |
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144 void vgm_ymf262_init(vgm_writer *writer, uint32_t clock); |
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145 void vgm_ymf262_part1_write(vgm_writer *writer, uint32_t cycle, uint8_t reg, uint8_t value); |
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146 void vgm_ymf262_part2_write(vgm_writer *writer, uint32_t cycle, uint8_t reg, uint8_t value); |
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147 void vgm_adjust_cycles(vgm_writer *writer, uint32_t deduction); |
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148 void vgm_close(vgm_writer *writer); |
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149 |
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150 #endif //VGM_H_ |