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annotate m68k_util.c @ 2587:e04c7e753bf6

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Implement divs and divu in new CPU core
author Michael Pavone <pavone@retrodev.com>
date Sat, 08 Feb 2025 20:04:18 -0800
parents 939b818df589
children e602dbf776d8
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 #include <string.h>
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2
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3 void m68k_read_8(m68k_context *context)
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4 {
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5 context->cycles += 4 * context->opts->gen.clock_divider;
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6 context->scratch1 = read_byte(context->scratch1, context->mem_pointers, &context->opts->gen, context);
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7 }
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8
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9 void m68k_read_16(m68k_context *context)
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10 {
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11 context->cycles += 4 * context->opts->gen.clock_divider;
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12 uint32_t tmp = context->scratch1;
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13 context->scratch1 = read_word(context->scratch1, context->mem_pointers, &context->opts->gen, context);
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14 }
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15
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16 void m68k_write_8(m68k_context *context)
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17 {
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18 context->cycles += 4 * context->opts->gen.clock_divider;
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19 write_byte(context->scratch2, context->scratch1, context->mem_pointers, &context->opts->gen, context);
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20 }
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21
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22 void m68k_write_16(m68k_context *context)
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23 {
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24 context->cycles += 4 * context->opts->gen.clock_divider;
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25 write_word(context->scratch2, context->scratch1, context->mem_pointers, &context->opts->gen, context);
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26 }
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27
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28 void m68k_sync_cycle(m68k_context *context, uint32_t target_cycle)
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29 {
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30 context->sync_cycle = target_cycle; //why?
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31 context->sync_components(context, 0);
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32 }
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33
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34 static void divu(m68k_context *context, uint32_t dividend_reg, uint32_t divisor)
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35 {
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36 uint32_t dividend = context->dregs[dividend_reg];
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37 uint32_t divisor_shift = divisor << 16;
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38 uint16_t quotient = 0;
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39 uint8_t force = 0;
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40 uint16_t bit = 0;
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41 uint32_t cycles = 2;
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42 if (divisor_shift < dividend) {
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43 context->nflag = 128;
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44 context->zflag = 0;
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45 context->vflag = 128;
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46 context->cycles += 6 * context->opts->gen.clock_divider;
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47 return;
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48 }
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49 for (int i = 0; i < 16; i++)
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50 {
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51 force = dividend >> 31;
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52 quotient = quotient << 1 | bit;
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53 dividend = dividend << 1;
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54
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55 if (force || dividend >= divisor_shift) {
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56 dividend -= divisor_shift;
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57 cycles += force ? 4 : 6;
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58 bit = 1;
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59 } else {
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60 bit = 0;
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61 cycles += 8;
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62 }
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63 }
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64 cycles += force ? 6 : bit ? 4 : 2;
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65 context->cycles += cycles * context->opts->gen.clock_divider;
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66 quotient = quotient << 1 | bit;
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67 context->dregs[dividend_reg] = dividend | quotient;
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68 context->vflag = 0;
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69 context->nflag = quotient >> 8 & 128;
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70 context->zflag = quotient == 0;
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71 }
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72
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73 static void divs(m68k_context *context, uint32_t dividend_reg, uint32_t divisor)
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74 {
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75 uint32_t dividend = context->dregs[dividend_reg];
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76 uint32_t divisor_shift = divisor << 16;
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77 uint32_t orig_divisor = divisor_shift, orig_dividend = dividend;
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78 if (divisor_shift & 0x80000000) {
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79 divisor_shift = 0 - divisor_shift;
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80 }
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81
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82 uint32_t cycles = 8;
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83 if (dividend & 0x80000000) {
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84 //dvs10
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85 dividend = 0 - dividend;
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86 cycles += 2;
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87 }
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88 if (divisor_shift <= dividend) {
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89 context->vflag = 128;
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90 context->nflag = 128;
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91 context->zflag = 0;
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92 cycles += 4;
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93 context->cycles += cycles * context->opts->gen.clock_divider;
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94 return;
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95 }
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96 uint16_t quotient = 0;
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97 uint16_t bit = 0;
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98 for (int i = 0; i < 15; i++)
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99 {
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100 quotient = quotient << 1 | bit;
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101 dividend = dividend << 1;
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102
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103 if (dividend >= divisor_shift) {
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104 dividend -= divisor_shift;
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105 cycles += 6;
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106 bit = 1;
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107 } else {
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108 bit = 0;
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109 cycles += 8;
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110 }
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111 }
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112 quotient = quotient << 1 | bit;
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113 dividend = dividend << 1;
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114 if (dividend >= divisor_shift) {
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115 dividend -= divisor_shift;
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116 quotient = quotient << 1 | 1;
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117 } else {
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118 quotient = quotient << 1;
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119 }
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120 cycles += 4;
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121
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122 context->vflag = 0;
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123 if (orig_divisor & 0x80000000) {
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124 cycles += 16; //was 10
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125 if (orig_dividend & 0x80000000) {
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126 if (quotient & 0x8000) {
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127 context->vflag = 128;
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128 context->nflag = 128;
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129 context->zflag = 0;
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130 context->cycles += cycles * context->opts->gen.clock_divider;
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131 return;
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132 } else {
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133 dividend = -dividend;
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134 }
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135 } else {
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136 quotient = -quotient;
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137 if (quotient && !(quotient & 0x8000)) {
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138 context->vflag = 128;
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139 }
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140 }
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141 } else if (orig_dividend & 0x80000000) {
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142 cycles += 18; // was 12
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143 quotient = -quotient;
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144 if (quotient && !(quotient & 0x8000)) {
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145 context->vflag = 128;
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146 } else {
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147 dividend = -dividend;
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148 }
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149 } else {
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150 cycles += 14; //was 10
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151 if (quotient & 0x8000) {
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152 context->vflag= 128;
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153 }
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154 }
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155 if (context->vflag) {
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156 context->nflag = 128;
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157 context->zflag = 0;
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158 context->cycles += cycles * context->opts->gen.clock_divider;
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159 return;
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160 }
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161 context->nflag = (quotient & 0x8000) ? 128 : 0;
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162 context->zflag = quotient == 0;
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163 //V was cleared above, C is cleared by the generated machine code
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164 context->cycles += cycles * context->opts->gen.clock_divider;
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165 context->dregs[dividend_reg] = dividend | quotient;
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166 }
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167
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168 static sync_fun *sync_comp_tmp;
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169 static int_ack_fun int_ack_tmp;
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170 void init_m68k_opts(m68k_options *opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider, sync_fun *sync_components, int_ack_fun int_ack)
1951
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171 {
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172 memset(opts, 0, sizeof(*opts));
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173 opts->gen.memmap = memmap;
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174 opts->gen.memmap_chunks = num_chunks;
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175 opts->gen.address_mask = 0xFFFFFF;
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176 opts->gen.byte_swap = 1;
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177 opts->gen.max_address = 0x1000000;
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178 opts->gen.bus_cycles = 4;
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179 opts->gen.clock_divider = clock_divider;
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180 sync_comp_tmp = sync_components;
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181 int_ack_tmp = int_ack;
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182 }
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183
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184 m68k_context *init_68k_context(m68k_options * opts, m68k_reset_handler *reset_handler)
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185 {
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186 m68k_context *context = calloc(1, sizeof(m68k_context));
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187 context->opts = opts;
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188 context->reset_handler = reset_handler;
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189 context->int_cycle = 0xFFFFFFFFU;
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190 context->int_pending = 255;
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191 context->sync_components = sync_comp_tmp;
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192 sync_comp_tmp = NULL;
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193 context->int_ack_handler = int_ack_tmp;
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194 int_ack_tmp = NULL;
1951
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195 return context;
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196 }
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197
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198 void m68k_reset(m68k_context *context)
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199 {
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200 //read initial SP
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201 context->scratch1 = 0;
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202 m68k_read_16(context);
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203 context->aregs[7] = context->scratch1 << 16;
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204 context->scratch1 = 2;
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205 m68k_read_16(context);
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206 context->aregs[7] |= context->scratch1;
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207
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208 //read initial PC
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209 context->scratch1 = 4;
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210 m68k_read_16(context);
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211 context->pc = context->scratch1 << 16;
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212 context->scratch1 = 6;
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213 m68k_read_16(context);
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214 context->pc |= context->scratch1;
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215
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216 context->scratch1 = context->pc;
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217 m68k_read_16(context);
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218 context->prefetch = context->scratch1;
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219 context->pc += 2;
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220
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221 context->status = 0x27;
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222 }
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223
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224 void m68k_print_regs(m68k_context *context)
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225 {
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226 printf("XNZVC\n%d%d%d%d%d\n", context->xflag != 0, context->nflag != 0, context->zflag != 0, context->vflag != 0, context->cflag != 0);
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227 for (int i = 0; i < 8; i++) {
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228 printf("d%d: %X\n", i, context->dregs[i]);
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229 }
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230 for (int i = 0; i < 8; i++) {
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231 printf("a%d: %X\n", i, context->aregs[i]);
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232 }
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233 }
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234
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235 void m68k_serialize(m68k_context *context, uint32_t pc, serialize_buffer *buf)
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236 {
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237 //TODO: implement me
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238 }
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239
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240 void m68k_deserialize(deserialize_buffer *buf, void *vcontext)
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241 {
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242 //TODO: implement me
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243 }
2500
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244
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245 void start_68k_context(m68k_context *context, uint32_t pc)
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246 {
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247 context->scratch1 = context->pc = pc;
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248 m68k_read_16(context);
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249 context->prefetch = context->scratch1;
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250 context->pc += 2;
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diff changeset
251 }