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comparison vdp.c @ 2337:0e3118325c1c

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Fix first column bug behavior
author Michael Pavone <pavone@retrodev.com>
date Thu, 31 Aug 2023 23:34:48 -0700
parents 83f5529086c5
children bc17ece8dd00
comparison
equal deleted inserted replaced
2336:83f5529086c5 2337:0e3118325c1c
1244 } else { 1244 } else {
1245 window_line_shift = 3; 1245 window_line_shift = 3;
1246 v_offset_mask = 0x7; 1246 v_offset_mask = 0x7;
1247 vscroll_shift = 3; 1247 vscroll_shift = 3;
1248 } 1248 }
1249 //TODO: Further research on vscroll latch behavior and the "first column bug" 1249 //TODO: Further research on vscroll latch behavior
1250 if (context->regs[REG_MODE_3] & BIT_VSCROLL) { 1250 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
1251 if (!column) { 1251 if (!column) {
1252 if (context->regs[REG_MODE_4] & BIT_H40) { 1252 if (context->regs[REG_MODE_4] & BIT_H40) {
1253 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP 1253 //Pre MD2VA4, behavior seems to vary from console to console
1254 //ends up fetching the last value on the VSRAM bus in the H40 case 1254 //On some consoles it's a stable AND, on some it's always zero and others it's an "unstable" AND
1255 //getting the last latched value should be close enough for now 1255 if (context->vsram_size == MIN_VSRAM_SIZE) {
1256 if (!vsram_off) { 1256 // For now just implement the AND behavior
1257 context->vscroll_latch[0] = context->vscroll_latch[1]; 1257 if (!vsram_off) {
1258 context->vscroll_latch[0] &= context->vscroll_latch[1];
1259 context->vscroll_latch[1] = context->vscroll_latch[0];
1260 }
1261 } else {
1262 //MD2VA4 and later use the column 0 value
1263 context->vscroll_latch[vsram_off] = context->vsram[vsram_off];
1258 } 1264 }
1259 } else { 1265 } else {
1260 //supposedly it's always forced to 0 in the H32 case 1266 //supposedly it's always forced to 0 in the H32 case
1267 //TODO: repeat H40 tests in H32 mode to confirm
1261 context->vscroll_latch[0] = context->vscroll_latch[1] = 0; 1268 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
1262 } 1269 }
1263 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) { 1270 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
1264 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off]; 1271 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1265 } 1272 }