Mercurial > repos > blastem
changeset 2337:0e3118325c1c
Fix first column bug behavior
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Thu, 31 Aug 2023 23:34:48 -0700 |
| parents | 83f5529086c5 |
| children | bc17ece8dd00 |
| files | vdp.c |
| diffstat | 1 files changed, 13 insertions(+), 6 deletions(-) [+] |
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--- a/vdp.c Thu Aug 31 20:28:33 2023 -0700 +++ b/vdp.c Thu Aug 31 23:34:48 2023 -0700 @@ -1246,18 +1246,25 @@ v_offset_mask = 0x7; vscroll_shift = 3; } - //TODO: Further research on vscroll latch behavior and the "first column bug" + //TODO: Further research on vscroll latch behavior if (context->regs[REG_MODE_3] & BIT_VSCROLL) { if (!column) { if (context->regs[REG_MODE_4] & BIT_H40) { - //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP - //ends up fetching the last value on the VSRAM bus in the H40 case - //getting the last latched value should be close enough for now - if (!vsram_off) { - context->vscroll_latch[0] = context->vscroll_latch[1]; + //Pre MD2VA4, behavior seems to vary from console to console + //On some consoles it's a stable AND, on some it's always zero and others it's an "unstable" AND + if (context->vsram_size == MIN_VSRAM_SIZE) { + // For now just implement the AND behavior + if (!vsram_off) { + context->vscroll_latch[0] &= context->vscroll_latch[1]; + context->vscroll_latch[1] = context->vscroll_latch[0]; + } + } else { + //MD2VA4 and later use the column 0 value + context->vscroll_latch[vsram_off] = context->vsram[vsram_off]; } } else { //supposedly it's always forced to 0 in the H32 case + //TODO: repeat H40 tests in H32 mode to confirm context->vscroll_latch[0] = context->vscroll_latch[1] = 0; } } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {