Mercurial > repos > blastem
comparison vdp.c @ 327:1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
author | Mike Pavone <pavone@retrodev.com> |
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date | Mon, 13 May 2013 21:06:08 -0700 |
parents | 8c01b4154480 |
children | bf7ed23efa40 |
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326:d3ff30f32359 | 327:1b00258b1f29 |
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8 #define BUF_BIT_PRIORITY 0x40 | 8 #define BUF_BIT_PRIORITY 0x40 |
9 #define MAP_BIT_PRIORITY 0x8000 | 9 #define MAP_BIT_PRIORITY 0x8000 |
10 #define MAP_BIT_H_FLIP 0x800 | 10 #define MAP_BIT_H_FLIP 0x800 |
11 #define MAP_BIT_V_FLIP 0x1000 | 11 #define MAP_BIT_V_FLIP 0x1000 |
12 | 12 |
13 #define BIT_PAL 0x8 | 13 //Mode reg 1 |
14 #define BIT_DMA_ENABLE 0x4 | 14 #define BIT_HINT_EN 0x10 |
15 #define BIT_H40 0x1 | 15 #define BIT_PAL_SEL 0x04 |
16 | 16 #define BIT_HVC_LATCH 0x02 |
17 #define BIT_DISP_DIS 0x01 | |
18 | |
19 //Mode reg 2 | |
20 #define BIT_DISP_EN 0x40 | |
21 #define BIT_VINT_EN 0x20 | |
22 #define BIT_DMA_ENABLE 0x10 | |
23 #define BIT_PAL 0x08 | |
24 #define BIT_MODE_5 0x04 | |
25 | |
26 //Mode reg 3 | |
27 #define BIT_EINT_EN 0x10 | |
28 #define BIT_VSCROLL 0x04 | |
29 | |
30 //Mode reg 4 | |
31 #define BIT_H40 0x01 | |
17 #define BIT_HILIGHT 0x8 | 32 #define BIT_HILIGHT 0x8 |
18 | 33 |
19 #define SCROLL_BUFFER_SIZE 32 | 34 #define SCROLL_BUFFER_SIZE 32 |
20 #define SCROLL_BUFFER_DRAW 16 | 35 #define SCROLL_BUFFER_DRAW 16 |
21 | 36 |
83 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; | 98 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
84 //printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); | 99 //printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
85 current_index = link; | 100 current_index = link; |
86 count++; | 101 count++; |
87 } while (current_index != 0 && count < 80); | 102 } while (current_index != 0 && count < 80); |
103 } | |
104 | |
105 void vdp_print_reg_explain(vdp_context * context) | |
106 { | |
107 char * hscroll[] = {"full", "7-line", "cell", "line"}; | |
108 printf("**Mode Group**\n" | |
109 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n" | |
110 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d\n" | |
111 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" | |
112 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", | |
113 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_PAL_SEL != 0, | |
114 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", | |
115 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", | |
116 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, | |
117 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full", | |
118 hscroll[context->regs[REG_MODE_3] & 0x3], | |
119 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled"); | |
120 printf("\n**Table Group**\n" | |
121 "02: %.2X | Scroll A Name Table: $%.4X\n" | |
122 "03: %.2X | Window Name Table: $%.4X\n" | |
123 "04: %.2X | Scroll B Name Table: $%.4X\n" | |
124 "05: %.2X | Sprite Attribute Table: $%.4X\n" | |
125 "0D: %.2X | HScroll Data Table: $%.4X\n", | |
126 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, | |
127 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, | |
128 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, | |
129 context->regs[REG_SAT], (context->regs[REG_SAT] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3E : 0x3F)) << 9, | |
130 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x1F) << 10); | |
131 char * sizes[] = {"32", "64", "invalid", "128"}; | |
132 printf("\n**Misc Group**\n" | |
133 "07: %.2X | Backdrop Color: $%X\n" | |
134 "0A: %.2X | H-Int Counter: %u\n" | |
135 "0F: %.2X | Auto-increment: $%X\n" | |
136 "10: %.2X | Scroll A/B Size: %sx%s\n", | |
137 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR] & 0x3F, | |
138 context->regs[REG_HINT], context->regs[REG_HINT], | |
139 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC], | |
140 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]); | |
141 | |
142 //TODO: Window Group, DMA Group | |
88 } | 143 } |
89 | 144 |
90 void scan_sprite_table(uint32_t line, vdp_context * context) | 145 void scan_sprite_table(uint32_t line, vdp_context * context) |
91 { | 146 { |
92 if (context->sprite_index && context->slot_counter) { | 147 if (context->sprite_index && context->slot_counter) { |
423 break; | 478 break; |
424 case 0x30: | 479 case 0x30: |
425 vscroll = 0x3FF; | 480 vscroll = 0x3FF; |
426 break; | 481 break; |
427 } | 482 } |
428 vscroll &= (context->vsram[(context->regs[REG_MODE_3] & 0x4 ? column : 0) + vsram_off] + line); | 483 vscroll &= (context->vsram[(context->regs[REG_MODE_3] & BIT_VSCROLL ? column : 0) + vsram_off] + line); |
429 context->v_offset = vscroll & 0x7; | 484 context->v_offset = vscroll & 0x7; |
430 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); | 485 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
431 vscroll /= 8; | 486 vscroll /= 8; |
432 uint16_t hscroll_mask; | 487 uint16_t hscroll_mask; |
433 uint16_t v_mul; | 488 uint16_t v_mul; |
1143 if (context->flags & FLAG_PENDING) { | 1198 if (context->flags & FLAG_PENDING) { |
1144 context->address = (context->address & 0x3FFF) | (value << 14); | 1199 context->address = (context->address & 0x3FFF) | (value << 14); |
1145 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C); | 1200 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C); |
1146 context->flags &= ~FLAG_PENDING; | 1201 context->flags &= ~FLAG_PENDING; |
1147 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); | 1202 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
1148 if (context->cd & 0x20) { | 1203 if (context->cd & 0x20 && (context->regs[REG_MODE_2] & BIT_DMA_ENABLE)) { |
1204 // | |
1149 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { | 1205 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { |
1150 //DMA copy or 68K -> VDP, transfer starts immediately | 1206 //DMA copy or 68K -> VDP, transfer starts immediately |
1151 context->flags |= FLAG_DMA_RUN; | 1207 context->flags |= FLAG_DMA_RUN; |
1152 context->dma_cd = context->cd; | 1208 context->dma_cd = context->cd; |
1153 if (!(context->regs[REG_DMASRC_H] & 0x80)) { | 1209 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
1210 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); | |
1154 return 1; | 1211 return 1; |
1212 } else { | |
1213 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
1155 } | 1214 } |
1215 } else { | |
1216 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd); | |
1156 } | 1217 } |
1157 } | 1218 } |
1158 } else { | 1219 } else { |
1159 if ((value & 0xC000) == 0x8000) { | 1220 if ((value & 0xC000) == 0x8000) { |
1160 //Register write | 1221 //Register write |
1317 } | 1378 } |
1318 } | 1379 } |
1319 | 1380 |
1320 uint32_t vdp_next_hint(vdp_context * context) | 1381 uint32_t vdp_next_hint(vdp_context * context) |
1321 { | 1382 { |
1322 if (!(context->regs[REG_MODE_1] & 0x10)) { | 1383 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
1323 return 0xFFFFFFFF; | 1384 return 0xFFFFFFFF; |
1324 } | 1385 } |
1325 if (context->flags2 & FLAG2_HINT_PENDING) { | 1386 if (context->flags2 & FLAG2_HINT_PENDING) { |
1326 return context->cycles; | 1387 return context->cycles; |
1327 } | 1388 } |
1338 return hcycle; | 1399 return hcycle; |
1339 } | 1400 } |
1340 | 1401 |
1341 uint32_t vdp_next_vint(vdp_context * context) | 1402 uint32_t vdp_next_vint(vdp_context * context) |
1342 { | 1403 { |
1343 if (!(context->regs[REG_MODE_2] & 0x20)) { | 1404 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
1344 return 0xFFFFFFFF; | 1405 return 0xFFFFFFFF; |
1345 } | 1406 } |
1346 if (context->flags2 & FLAG2_VINT_PENDING) { | 1407 if (context->flags2 & FLAG2_VINT_PENDING) { |
1347 return context->cycles; | 1408 return context->cycles; |
1348 } | 1409 } |